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authorRich Felker <dalias@aerifal.cx>2024-02-29 11:02:29 -0500
committerRich Felker <dalias@aerifal.cx>2024-02-29 16:36:55 -0500
commit3ea3fcf78a5532e118856846df8adbf3f60ef716 (patch)
treeafb3892aac50017bea2f71fbd8067a39886a8447 /arch/riscv32/bits/sem.h
parentb28c44de8c3131b45588f61569b1711c987ba1c3 (diff)
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riscv32: add sysvipc msg/sem/shm bits
despite riscv32 being natively time64, the IPC_TIME64 bit (0x100) is
set in IPC_STAT and derived command macros, differentiating their
values from the raw command values used to interface with the kernel.
this reflects that the kernel ipc structure types are not natively
time64, but have broken-down hi/lo fields that cannot be used in-place
and require translation, and that the userspace struct types differ
from the kernel types (relevant to things like strace).
Diffstat (limited to 'arch/riscv32/bits/sem.h')
-rw-r--r--arch/riscv32/bits/sem.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/riscv32/bits/sem.h b/arch/riscv32/bits/sem.h
new file mode 100644
index 00000000..544e3d2a
--- /dev/null
+++ b/arch/riscv32/bits/sem.h
@@ -0,0 +1,18 @@
+struct semid_ds {
+	struct ipc_perm sem_perm;
+	unsigned long __sem_otime_lo;
+	unsigned long __sem_otime_hi;
+	unsigned long __sem_ctime_lo;
+	unsigned long __sem_ctime_hi;
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+	unsigned short sem_nsems;
+	char __sem_nsems_pad[sizeof(long)-sizeof(short)];
+#else
+	char __sem_nsems_pad[sizeof(long)-sizeof(short)];
+	unsigned short sem_nsems;
+#endif
+	long __unused3;
+	long __unused4;
+	time_t sem_otime;
+	time_t sem_ctime;
+};