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* aarch64/fpu: Add vector variants of sinhJoe Ramsay2024-04-041-0/+5
* aarch64/fpu: Add vector variants of atanhJoe Ramsay2024-04-041-0/+5
* aarch64/fpu: Add vector variants of asinhJoe Ramsay2024-04-041-0/+5
* aarch64/fpu: Add vector variants of acoshJoe Ramsay2024-04-041-0/+5
* aarch64/fpu: Add vector variants of coshJoe Ramsay2024-04-041-0/+5
* aarch64/fpu: Add vector variants of erfJoe Ramsay2024-04-041-0/+7
* aarch64: Add half-width versions of AdvSIMD f32 libmvec routinesJoe Ramsay2023-12-201-0/+15
* aarch64: Add vector implementations of expm1 routinesJoe Ramsay2023-11-201-0/+4
* aarch64: Add vector implementations of log1p routinesJoe Ramsay2023-11-101-0/+4
* aarch64: Add vector implementations of atan2 routinesJoe Ramsay2023-11-101-0/+4
* aarch64: Add vector implementations of atan routinesJoe Ramsay2023-11-101-0/+4
* aarch64: Add vector implementations of acos routinesJoe Ramsay2023-11-101-0/+4
* aarch64: Add vector implementations of asin routinesJoe Ramsay2023-11-101-0/+4
* aarch64: Add vector implementations of exp10 routinesJoe Ramsay2023-10-231-0/+4
* aarch64: Add vector implementations of log10 routinesJoe Ramsay2023-10-231-0/+4
* aarch64: Add vector implementations of log2 routinesJoe Ramsay2023-10-231-0/+4
* aarch64: Add vector implementations of exp2 routinesJoe Ramsay2023-10-231-0/+4
* aarch64: Add vector implementations of tan routinesJoe Ramsay2023-10-231-0/+6
* aarch64: Add vector implementations of exp routinesJoe Ramsay2023-06-301-0/+4
* aarch64: Add vector implementations of log routinesJoe Ramsay2023-06-301-0/+4
* aarch64: Add vector implementations of sin routinesJoe Ramsay2023-06-301-0/+4
* Enable libmvec support for AArch64Joe Ramsay2023-05-031-0/+8
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