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authorWilco <wdijkstr@arm.com>2014-06-02 12:44:21 +0100
committerMarcus Shawcroft <marcus.shawcroft@arm.com>2014-06-02 12:44:21 +0100
commita88dadbed5d7589ac7880efe62ea511844107795 (patch)
tree7b3f1a951cd806a593d673bf7854174d9e94b6bb /sysdeps/aarch64
parentc95b3011018893fcc473279768a67a24a73bbef2 (diff)
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[AArch64] Remove ISB after FPCR write.
Diffstat (limited to 'sysdeps/aarch64')
-rw-r--r--sysdeps/aarch64/fpu/fpu_control.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/sysdeps/aarch64/fpu/fpu_control.h b/sysdeps/aarch64/fpu/fpu_control.h
index 6a265e89b5..d5a890d990 100644
--- a/sysdeps/aarch64/fpu/fpu_control.h
+++ b/sysdeps/aarch64/fpu/fpu_control.h
@@ -24,11 +24,8 @@
 #define _FPU_GETCW(fpcr) \
   __asm__ __volatile__ ("mrs	%0, fpcr" : "=r" (fpcr))
 
-#define _FPU_SETCW(fpcr)				   \
-  {							   \
-    __asm__ __volatile__ ("msr	fpcr, %0" : : "r" (fpcr)); \
-    __asm__ __volatile__ ("isb");			   \
-  }
+#define _FPU_SETCW(fpcr) \
+  __asm__ __volatile__ ("msr	fpcr, %0" : : "r" (fpcr))
 
 #define _FPU_GETFPSR(fpsr) \
   __asm__ __volatile__ ("mrs	%0, fpsr" : "=r" (fpsr))