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| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2023-10-05 17:10:49 +0100 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2023-10-23 15:00:45 +0100 |
| commit | b39e9db5e305365db0c347fd308b7c0d86e3507b (patch) | |
| tree | e7fccd5c92b1769601497ce2b83f97405dee54f4 /sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | |
| parent | f554334c05a95c6b4df532ddc88cd3e72dc7d04c (diff) | |
| download | glibc-b39e9db5e305365db0c347fd308b7c0d86e3507b.tar.gz glibc-b39e9db5e305365db0c347fd308b7c0d86e3507b.tar.xz glibc-b39e9db5e305365db0c347fd308b7c0d86e3507b.zip | |
aarch64: Add vector implementations of exp2 routines
Some routines reuse table from v_exp_data.c
Diffstat (limited to 'sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c')
| -rw-r--r-- | sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c index 66c6227087..02ab609b5a 100644 --- a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c +++ b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c @@ -25,6 +25,7 @@ VPCS_VECTOR_WRAPPER (cosf_advsimd, _ZGVnN4v_cosf) VPCS_VECTOR_WRAPPER (expf_advsimd, _ZGVnN4v_expf) +VPCS_VECTOR_WRAPPER (exp2f_advsimd, _ZGVnN4v_exp2f) VPCS_VECTOR_WRAPPER (logf_advsimd, _ZGVnN4v_logf) VPCS_VECTOR_WRAPPER (sinf_advsimd, _ZGVnN4v_sinf) VPCS_VECTOR_WRAPPER (tanf_advsimd, _ZGVnN4v_tanf) |