From b39e9db5e305365db0c347fd308b7c0d86e3507b Mon Sep 17 00:00:00 2001 From: Joe Ramsay Date: Thu, 5 Oct 2023 17:10:49 +0100 Subject: aarch64: Add vector implementations of exp2 routines Some routines reuse table from v_exp_data.c --- sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | 1 + 1 file changed, 1 insertion(+) (limited to 'sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c') diff --git a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c index 66c6227087..02ab609b5a 100644 --- a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c +++ b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c @@ -25,6 +25,7 @@ VPCS_VECTOR_WRAPPER (cosf_advsimd, _ZGVnN4v_cosf) VPCS_VECTOR_WRAPPER (expf_advsimd, _ZGVnN4v_expf) +VPCS_VECTOR_WRAPPER (exp2f_advsimd, _ZGVnN4v_exp2f) VPCS_VECTOR_WRAPPER (logf_advsimd, _ZGVnN4v_logf) VPCS_VECTOR_WRAPPER (sinf_advsimd, _ZGVnN4v_sinf) VPCS_VECTOR_WRAPPER (tanf_advsimd, _ZGVnN4v_tanf) -- cgit 1.4.1