diff options
| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2023-06-28 12:19:39 +0100 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2023-06-30 09:04:26 +0100 |
| commit | 4a9392ffc27ad280f84779eea3ba01f2c134d1d8 (patch) | |
| tree | 8716efd89aadc70338eeff9622cfcbdd7ff7911e /sysdeps/aarch64/fpu/Makefile | |
| parent | 78c01a5cbeb6717ffa2d4d66bb90ac5c39bd81a9 (diff) | |
| download | glibc-4a9392ffc27ad280f84779eea3ba01f2c134d1d8.tar.gz glibc-4a9392ffc27ad280f84779eea3ba01f2c134d1d8.tar.xz glibc-4a9392ffc27ad280f84779eea3ba01f2c134d1d8.zip | |
aarch64: Add vector implementations of exp routines
Optimised implementations for single and double precision, Advanced SIMD and SVE, copied from Arm Optimized Routines. As previously, data tables are used via a barrier to prevent overly aggressive constant inlining. Special-case handlers are marked NOINLINE to avoid incurring the penalty of switching call standards unnecessarily. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/aarch64/fpu/Makefile')
| -rw-r--r-- | sysdeps/aarch64/fpu/Makefile | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sysdeps/aarch64/fpu/Makefile b/sysdeps/aarch64/fpu/Makefile index cc90c4cb75..04aa2e37ca 100644 --- a/sysdeps/aarch64/fpu/Makefile +++ b/sysdeps/aarch64/fpu/Makefile @@ -1,4 +1,5 @@ libmvec-supported-funcs = cos \ + exp \ log \ sin @@ -12,7 +13,8 @@ libmvec-support = $(addsuffix f_advsimd,$(float-advsimd-funcs)) \ $(addsuffix _advsimd,$(double-advsimd-funcs)) \ $(addsuffix f_sve,$(float-sve-funcs)) \ $(addsuffix _sve,$(double-sve-funcs)) \ - v_log_data + v_log_data \ + v_exp_data endif sve-cflags = -march=armv8-a+sve |