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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 09:46:46 -0600 |
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| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 12:58:33 -0600 |
| commit | cac626d60a863e48ab75417064984769e58c5719 (patch) | |
| tree | 72cfaf38f3f0ae48808e8a088526c12592dc2feb /ChangeLog | |
| parent | 4393fc119c34e97519b9b7a4fc94066b283be452 (diff) | |
| download | glibc-cac626d60a863e48ab75417064984769e58c5719.tar.gz glibc-cac626d60a863e48ab75417064984769e58c5719.tar.xz glibc-cac626d60a863e48ab75417064984769e58c5719.zip | |
PowerPC: Optimized finite/finitef for POWER8
This patch add a optimized finite/finitef implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 39bc73d5e5..ee2ed4ed0b 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,19 @@ 2014-02-27 Adhemerval Zanella <azanella@linux.vnet.ibm.com> + * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add finite power8 + implementation. + * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power8.S: New file: + POWER8 finite ifunc implementation. + * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c (__finite): Add + POWER8 implementation. + * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c (__finitef): + Likewise. + * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: New file: + POWER8 finite implementation. + * sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S: New file. + +2014-02-27 Adhemerval Zanella <azanella@linux.vnet.ibm.com> + * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add isinf power8 implementation. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S: New file: |