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| author | Rich Felker <dalias@aerifal.cx> | 2015-04-17 22:19:01 -0400 |
|---|---|---|
| committer | Rich Felker <dalias@aerifal.cx> | 2015-04-17 22:19:01 -0400 |
| commit | aecdbb3042704075b303b626da424aa0665e4f97 (patch) | |
| tree | 5eac6f13b1da36bf5d7cbcadfb91a85151c43694 /src/ldso | |
| parent | 33615cd5ca4d40286d3000a941f96c5bebdf39fb (diff) | |
| download | musl-aecdbb3042704075b303b626da424aa0665e4f97.tar.gz musl-aecdbb3042704075b303b626da424aa0665e4f97.tar.xz musl-aecdbb3042704075b303b626da424aa0665e4f97.zip | |
fix PLT call offset in sh dlsym asm
the braf instruction's destination register is an offset from the address of the braf instruction plus 4 (or equivalently, the address of the next instruction after the delay slot). the code for dlsym was incorrectly computing the offset to pass using the address of the delay slot itself. in other places, a label was placed after the delay slot, but I find this confusing. putting the label on the branch instruction itself, and manually adding 4, makes it more clear which branch the offset in the constant pool goes with.
Diffstat (limited to 'src/ldso')
| -rw-r--r-- | src/ldso/sh/dlsym.s | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/ldso/sh/dlsym.s b/src/ldso/sh/dlsym.s index bc8fd679..11a6fff5 100644 --- a/src/ldso/sh/dlsym.s +++ b/src/ldso/sh/dlsym.s @@ -4,8 +4,8 @@ .type dlsym, @function dlsym: mov.l L1, r0 - braf r0 -1: mov.l @r15, r6 +1: braf r0 + mov.l @r15, r6 .align 2 -L1: .long __dlsym@PLT-(1b-.) +L1: .long __dlsym@PLT-(1b+4-.) |