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authorRich Felker <dalias@aerifal.cx>2011-02-12 00:26:24 -0500
committerRich Felker <dalias@aerifal.cx>2011-02-12 00:26:24 -0500
commit0bcbb53dc492aae22039445bfdb609bd8d615992 (patch)
tree8dae58fd91a9ac097ccdcabdec684298f1f87b68 /src/internal
parent0b44a0315b47dd8eced9f3b7f31580cf14bbfc01 (diff)
downloadmusl-0bcbb53dc492aae22039445bfdb609bd8d615992.tar.gz
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ensure that the compiler doesn't try to reorder around atomic ops
Diffstat (limited to 'src/internal')
-rw-r--r--src/internal/atomic.h26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/internal/atomic.h b/src/internal/atomic.h
index a15f8c2a..e74e4535 100644
--- a/src/internal/atomic.h
+++ b/src/internal/atomic.h
@@ -15,13 +15,13 @@ static inline int a_ctz_64(uint64_t x)
 static inline void a_and_64(volatile uint64_t *p, uint64_t v)
 {
 	__asm__( "lock ; andl %1, (%0) ; lock ; andl %2, 4(%0)"
-		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) );
+		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
 }
 
 static inline void a_or_64(volatile uint64_t *p, uint64_t v)
 {
 	__asm__( "lock ; orl %1, (%0) ; lock ; orl %2, 4(%0)"
-		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) );
+		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
 }
 
 static inline void a_store_l(volatile void *p, long x)
@@ -32,49 +32,49 @@ static inline void a_store_l(volatile void *p, long x)
 static inline void a_or_l(volatile void *p, long v)
 {
 	__asm__( "lock ; orl %1, %0"
-		: "=m"(*(long *)p) : "r"(v) );
+		: "=m"(*(long *)p) : "r"(v) : "memory" );
 }
 
 static inline void *a_cas_p(volatile void *p, void *t, void *s)
 {
 	__asm__( "lock ; cmpxchg %3, %1"
-		: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) );
+		: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
 	return t;
 }
 
 static inline long a_cas_l(volatile void *p, long t, long s)
 {
 	__asm__( "lock ; cmpxchg %3, %1"
-		: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) );
+		: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
 	return t;
 }
 
 static inline void *a_swap_p(void *volatile *x, void *v)
 {
-	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(void **)x) : "0"(v) );
+	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(void **)x) : "0"(v) : "memory" );
 	return v;
 }
 static inline long a_swap_l(volatile void *x, long v)
 {
-	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(long *)x) : "0"(v) );
+	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(long *)x) : "0"(v) : "memory" );
 	return v;
 }
 
 static inline void a_or(volatile void *p, int v)
 {
 	__asm__( "lock ; orl %1, %0"
-		: "=m"(*(int *)p) : "r"(v) );
+		: "=m"(*(int *)p) : "r"(v) : "memory" );
 }
 
 static inline void a_and(volatile void *p, int v)
 {
 	__asm__( "lock ; andl %1, %0"
-		: "=m"(*(int *)p) : "r"(v) );
+		: "=m"(*(int *)p) : "r"(v) : "memory" );
 }
 
 static inline int a_swap(volatile int *x, int v)
 {
-	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) );
+	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
 	return v;
 }
 
@@ -82,18 +82,18 @@ static inline int a_swap(volatile int *x, int v)
 
 static inline int a_fetch_add(volatile int *x, int v)
 {
-	__asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) );
+	__asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
 	return v;
 }
 
 static inline void a_inc(volatile int *x)
 {
-	__asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) );
+	__asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
 }
 
 static inline void a_dec(volatile int *x)
 {
-	__asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) );
+	__asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
 }
 
 static inline void a_store(volatile int *p, int x)