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authorRich Felker <dalias@aerifal.cx>2024-02-03 19:59:26 -0500
committerRich Felker <dalias@aerifal.cx>2024-02-03 19:59:26 -0500
commit407aea628af8c81d9e3f5a068568f2217db71bba (patch)
tree6c6e063cf6aee7ac6548b2c6a21f7c4bcebe8c64 /arch/riscv64
parent2e1bb87af24e3cb053bb3d5f4bb6e2e72f79c44a (diff)
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riscv: add TLSDESC support
Diffstat (limited to 'arch/riscv64')
-rw-r--r--arch/riscv64/reloc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv64/reloc.h b/arch/riscv64/reloc.h
index 1ca13811..7c7c0611 100644
--- a/arch/riscv64/reloc.h
+++ b/arch/riscv64/reloc.h
@@ -17,6 +17,7 @@
 #define REL_DTPMOD      R_RISCV_TLS_DTPMOD64
 #define REL_DTPOFF      R_RISCV_TLS_DTPREL64
 #define REL_TPOFF       R_RISCV_TLS_TPREL64
+#define REL_TLSDESC     R_RISCV_TLSDESC
 
 #define CRTJMP(pc,sp) __asm__ __volatile__( \
 	"mv sp, %1 ; jr %0" : : "r"(pc), "r"(sp) : "memory" )