add or1k (OpenRISC 1000) architecture port

With the exception of a fenv implementation, the port is fully featured.
The port has been tested in or1ksim, the golden reference functional
simulator for OpenRISC 1000.
It passes all libc-test tests (except the math tests that
requires a fenv implementation).

The port assumes an or1k implementation that has support for
atomic instructions (l.lwa/l.swa).

Although it passes all the libc-test tests, the port is still
in an experimental state, and has yet experienced very little
'real-world' use.

1 files changed, 11 insertions, 0 deletions

diff --git a/arch/or1k/bits/sem.h b/arch/or1k/bits/sem.h
new file mode 100644
index 00000000..0d916484
--- /dev/null
+++ b/arch/or1k/bits/sem.h
@@ -0,0 +1,11 @@
+struct semid_ds {
+	struct ipc_perm sem_perm;
+	time_t sem_otime;
+	time_t __unused1;
+	time_t sem_ctime;
+	time_t __unused2;
+	char __sem_nsems_pad[sizeof(time_t)-sizeof(short)];
+	unsigned short sem_nsems;
+	time_t __unused3;
+	time_t __unused4;
+};