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path: root/nptl/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h
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/*  4 instruction cycles not accessing cache and TLB are needed after
    trapa instruction to avoid an SH-4 silicon bug.  */
#define NEED_SYSCALL_INST_PAD
#include <sysdeps/unix/sysv/linux/sh/lowlevellock.h>