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* Improve 64 bit memchr, memrchr, rawmemchr with SSE2Liubov Dmitrieva2011-10-071-3/+7
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* Move Atom-optimized code out of the way and togetherUlrich Drepper2011-09-063-3/+3
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* Fix whitespacesUlrich Drepper2011-09-052-2/+0
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* Add Atom-optimized strchr and strrchr for x86-64Liubov Dmitrieva2011-09-055-3/+851
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* Fix inline strncat/strncmp on x86Andreas Schwab2011-08-041-1/+1
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* Fix overflow bug is optimized strncat for x86-64Ulrich Drepper2011-07-212-29/+27
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* Fix whitespacesUlrich Drepper2011-07-194-12/+9
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* Improve 64 bit strcat functions with SSE2/SSSE3Liubov Dmitrieva2011-07-1915-318/+1486
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* Improved st{r,p}{,n}cpy for SSE2 and SSSE3 on x86-64H.J. Lu2011-06-2410-1838/+5488
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* Optimized st{r,p}{,n}cpy for SSE2/SSSE3 on x86-32H.J. Lu2011-06-242-3/+14
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* Assume Intel Core i3/i5/i7 processor if AVX is availableH.J. Lu2011-06-031-0/+7
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* Fix static linking with checking x86/x86-64 memcpy.Mike Frysinger2011-04-172-2/+2
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* Work around old buggy program which cannot cope with memcpy semantics.H.J. Lu2011-04-012-5/+15
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* Handle page boundaries in x86 SSE4.2 strncmp.H.J. Lu2011-03-211-15/+30
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* Enable SSE2 memset for AMD'supcoming Orochi processor.Harsha Jagasia2011-03-041-2/+10
| | | | | | | | | This patch enables SSE2 memset for AMD's upcoming Orochi processor. This patch also fixes the following bug: For misaligned blocks larger than > 144 Bytes, memset branches into the integer code path depending on the value of misalignment even if the startup code chooses the SSE2 code path upfront, when multiarch is enabled.
* Fix some warning nits.Roland McGrath2011-02-041-0/+1
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* Support Intel processor model 6 and model 0x2.H.J. Lu2010-11-121-0/+1
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* Fix one exit path in x86-64 SSE4.2 str{,n}casecmp.H.J. Lu2010-11-101-0/+6
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* Use IFUNC on x86-64 memsetH.J. Lu2010-11-088-4/+210
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* Fix x86-64 strchr propagation of search byte into all bytes of SSE registerRichard Li2010-10-251-2/+2
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* Implement accurate fma.Jakub Jelinek2010-10-131-2/+2
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* Correct implementation of fmaf.Jakub Jelinek2010-10-111-2/+2
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* Re-enable all strncasecmp versions.Ulrich Drepper2010-09-201-2/+0
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* Fix limit detection in x86-64 SSE2 strncasecmp.Ulrich Drepper2010-09-201-0/+2
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* Move slow Atom code to separate section.Ulrich Drepper2010-08-261-1/+1
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* Unroll x86-64 strlenH.J. Lu2010-08-264-69/+401
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* Missing comma in last commit.H.J. Lu2010-08-261-1/+1
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* Clean up warnings in new x86_64/multiarch code.Roland McGrath2010-08-255-21/+63
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* Unroll 32bit SSE strlen and handle slow bsfH.J. Lu2010-08-252-0/+12
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* Add missing copyright year updated and pretty printing.Ulrich Drepper2010-08-243-3/+3
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* Clean up SSE variable shiftsRichard Henderson2010-08-246-354/+73
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* Fix two typos in x86-64 SSE4.2 strncasecmp implementation.Ulrich Drepper2010-08-191-2/+2
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* Fix fourth parameter of SSE4.2 strcmp for x86-64.Ulrich Drepper2010-08-151-3/+3
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* Add optimized strncasecmp versions for x86-64.Ulrich Drepper2010-08-144-223/+306
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* Fix x86-64 build without multiarch.Ulrich Drepper2010-08-141-0/+1
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* Add support for SSSE3 and SSE4.2 versions of strcasecmp on x86-64.Ulrich Drepper2010-07-314-20/+373
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* Pretty printing x86-64 SSE4.3 strcmp.Ulrich Drepper2010-07-301-29/+29
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* Fix tolower operation in strcasestr.Ulrich Drepper2010-07-301-1/+1
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* Avoid compiling unneeded file in ld.so.Ulrich Drepper2010-07-271-3/+5
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* Speed up x86-64 strcasestr a bit moew.Ulrich Drepper2010-07-241-5/+11
| | | | | Using the new SSE4.2 instructions is cool but not really the fastest. Some older SSE instructions can do the trick faster.
* Add strcasestr-nonascii to i386 buildAndreas Schwab2010-07-212-7/+10
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* Fix non-ASCII case of SSE4.2 strcasstr.Ulrich Drepper2010-07-161-0/+2
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* Speed up SSE4.2 strcasestr by avoiding indirect function call.Ulrich Drepper2010-07-164-49/+76
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* Improve 64bit memcpy/memmove for Atom, Core 2 and Core i7H.J. Lu2010-06-3016-6/+6635
| | | | | | | This patch includes optimized 64bit memcpy/memmove for Atom, Core 2 and Core i7. It improves memcpy by up to 3X on Atom, up to 4X on Core 2 and up to 1X on Core i7. It also improves memmove by up to 3X on Atom, up to 4X on Core 2 and up to 2X on Core i7.
* Incorrect x86 CPU family and model check.H.J. Lu2010-05-271-3/+3
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* Check DATA_CACHE_SIZE_HALFH.J. Lu2010-04-141-2/+2
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* Optimie x86-64 SSE4 memcmp for unaligned data.H.J. Lu2010-04-141-6/+371
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* x86-64 SSE4 optimized memcmpH.J. Lu2010-04-144-1/+1331
| | | | | This is 64bit SSE4 optimized memcmp. It improves memcmp by upto 3X on Intel Core i7.
* Update x86-64 cpu multiarch selection header.Ulrich Drepper2010-04-131-17/+21
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* Fix concurrent handling of __cpu_features.Ulrich Drepper2010-04-042-14/+23
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