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path: root/sysdeps/x86_64/multiarch/init-arch.c
Commit message (Expand)AuthorAgeFilesLines
* Add _dl_x86_cpu_features to rtld_globalH.J. Lu2015-08-131-223/+0
* This patch adds detection of availability for AVX512F and AVX512DQ ISAs.Andrew Senkevich2015-06-081-0/+17
* Use AVX unaligned memcpy only if AVX2 is availableH.J. Lu2015-01-301-2/+7
* Also treat model numbers 0x5a/0x5d as SilvermontH.J. Lu2015-01-231-0/+2
* Treat model numbers 0x4a/0x4d as SilvermontH.J. Lu2015-01-231-0/+2
* Update copyright dates with scripts/update-copyrights.Joseph Myers2015-01-021-1/+1
* Detect if AVX2 is usableSihai Yao2014-04-171-0/+3
* Update copyright notices with scripts/update-copyrightsAllan McRae2014-01-011-1/+1
* Skip SSE4.2 versions on Intel SilvermontLiubov Dmitrieva2013-06-281-1/+9
* Set fast unaligned load flag for new Intel microarchitectureLiubov Dmitrieva2013-06-141-0/+7
* Remove Prefer_SSE_for_memop on x64Ondrej Bilka2013-03-111-11/+0
* Add HAS_RTMH.J. Lu2013-01-031-0/+7
* Update copyright notices with scripts/update-copyrights.Joseph Myers2013-01-021-1/+1
* Define HAS_FMA with bit_FMA_UsableH.J. Lu2012-10-021-0/+3
* BZ#14059: Fix AVX and FMA4 detection.Carlos O'Donell2012-05-171-10/+17
* Replace FSF snail mail address with URLs.Paul Eggert2012-02-091-3/+2
* Really fix AVX testsUlrich Drepper2012-01-261-7/+7
* Reset bit_AVX in __cpu_features is OS support is missingUlrich Drepper2012-01-261-1/+13
* Fix compilation problems in x86-64 init-archUlrich Drepper2011-10-211-1/+2
* Check for FMA4 support and generate appropriate fma functionsUlrich Drepper2011-10-201-1/+9
* Improve 64 bit strcat functions with SSE2/SSSE3Liubov Dmitrieva2011-07-191-3/+7
* Optimized st{r,p}{,n}cpy for SSE2/SSSE3 on x86-32H.J. Lu2011-06-241-3/+8
* Assume Intel Core i3/i5/i7 processor if AVX is availableH.J. Lu2011-06-031-0/+7
* Enable SSE2 memset for AMD'supcoming Orochi processor.Harsha Jagasia2011-03-041-2/+10
* Support Intel processor model 6 and model 0x2.H.J. Lu2010-11-121-0/+1
* Use IFUNC on x86-64 memsetH.J. Lu2010-11-081-0/+5
* Unroll 32bit SSE strlen and handle slow bsfH.J. Lu2010-08-251-0/+6
* Improve 64bit memcpy/memmove for Atom, Core 2 and Core i7H.J. Lu2010-06-301-3/+6
* Incorrect x86 CPU family and model check.H.J. Lu2010-05-271-3/+3
* Fix concurrent handling of __cpu_features.Ulrich Drepper2010-04-041-12/+21
* Optimize 32bit memset/memcpy with SSE2/SSSE3.H.J. Lu2010-01-121-1/+17
* Clean up x86 multiarch HAS_FOO macros.Roland McGrath2009-10-061-0/+1
* Remove ENABLE_SSSE3_ON_ATOM.H.J. Lu2009-08-281-9/+1
* Support multiarch for i686.H.J. Lu2009-07-311-10/+8
* Prepare use if IFUNC functions outside libc.so.Ulrich Drepper2009-07-291-0/+10
* Perform test for Arom x86-64 in central place and handle it.Ulrich Drepper2009-07-231-1/+7
* Fix little checkin problem in last patch.Ulrich Drepper2009-06-301-2/+2
* Determine and store processor family and model on x86-64.H.J. Lu2009-06-301-8/+29
* Simplify CPUID value handling.Ulrich Drepper2009-05-311-11/+7
* * config.h.in (USE_MULTIARCH): Define.Ulrich Drepper2009-03-131-0/+65
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