| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Update copyright dates with scripts/update-copyrights | Paul Eggert | 2022-01-01 | 1 | -1/+1 |
| * | x86: Double size of ERMS rep_movsb_threshold in dl-cacheinfo.h | Noah Goldstein | 2021-11-06 | 1 | -3/+5 |
| * | x86: Set rep_movsb_threshold to 2112 on processors with FSRM | H.J. Lu | 2021-05-03 | 1 | -0/+4 |
| * | x86: Handle _SC_LEVEL1_ICACHE_LINESIZE [BZ #27444] | H.J. Lu | 2021-03-15 | 1 | -0/+6 |
| * | x86: Use SIZE_MAX instead of (long int)-1 for tunable range value | Siddhesh Poyarekar | 2021-02-10 | 1 | -5/+5 |
| * | tunables: Simplify TUNABLE_SET interface | Siddhesh Poyarekar | 2021-02-10 | 1 | -9/+6 |
| * | x86: Adding an upper bound for Enhanced REP MOVSB. | Sajan Karumanchi | 2021-02-02 | 1 | -1/+14 |
| * | <sys/platform/x86.h>: Remove the C preprocessor magic | H.J. Lu | 2021-01-21 | 1 | -2/+2 |
| * | x86: Move x86 processor cache info to cpu_features | H.J. Lu | 2021-01-14 | 1 | -0/+460 |
| * | Update copyright dates with scripts/update-copyrights | Paul Eggert | 2021-01-02 | 1 | -1/+1 |
| * | x86: Initialize CPU info via IFUNC relocation [BZ 26203] | H.J. Lu | 2020-10-16 | 1 | -0/+478 |
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index : mirror/glibc | |
| mirror of git://sourceware.org/git/glibc.git | Leah Neukirchen |
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