| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Update copyright dates with scripts/update-copyrights | Paul Eggert | 2021-01-02 | 5 | -5/+5 |
| * | RISC-V: Build infrastructure for 32-bit port | Zong Li | 2020-08-27 | 3 | -0/+5 |
| * | RISC-V: Fix llrint and llround missing exceptions on RV32 | Zong Li | 2020-08-27 | 1 | -0/+38 |
| * | RISC-V: Add the RV32 libm-test-ulps | Alistair Francis | 2020-08-27 | 2 | -0/+1406 |
| * | RISC-V: Add hard float support for 32-bit CPUs | Zong Li | 2020-08-27 | 4 | -0/+124 |
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index : mirror/glibc | |
| mirror of git://sourceware.org/git/glibc.git | Leah Neukirchen |
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