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* Update copyright dates with scripts/update-copyrightsJoseph Myers2023-01-061-1/+1
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* Update copyright dates with scripts/update-copyrightsPaul Eggert2022-01-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 7061 files FOO. I then removed trailing white space from math/tgmath.h, support/tst-support-open-dev-null-range.c, and sysdeps/x86_64/multiarch/strlen-vec.S, to work around the following obscure pre-commit check failure diagnostics from Savannah. I don't know why I run into these diagnostics whereas others evidently do not. remote: *** 912-#endif remote: *** 913: remote: *** 914- remote: *** error: lines with trailing whitespace found ... remote: *** error: sysdeps/unix/sysv/linux/statx_cp.c: trailing lines
* [powerpc] Tighten contraints for asm constant parametersPaul A. Clarke2021-11-031-4/+4
| | | | | | | | | | | | There are a few places where only known numeric values are acceptable for `asm` parameters, yet the constraint "i" is used. "i" can include "symbolic constants whose values will be known only at assembly time or later." Use "n" instead of "i" where known numeric values are required. Suggested-by: Segher Boessenkool <segher@kernel.crashing.org> Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
* Update copyright dates with scripts/update-copyrightsPaul Eggert2021-01-021-1/+1
| | | | | | | | | | | | | | | | I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
* Update copyright dates with scripts/update-copyrights.Joseph Myers2020-01-011-1/+1
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* [powerpc] Rename fesetenv_mode to fesetenv_controlPaul A. Clarke2019-09-271-1/+1
| | | | | | | fesetenv_mode is used variously to write the FPSCR exception enable bits and rounding mode bits. These are referred to as the control bits in the POWER ISA. Change the name to be reflective of its current and expected use, and match up well with fegetenv_control.
* [powerpc] Rename fegetenv_status to fegetenv_controlPaul A. Clarke2019-09-271-3/+3
| | | | | | | | | | | fegetenv_status is used variously to retrieve the FPSCR exception enable bits, rounding mode bits, or both. These are referred to as the control bits in the POWER ISA. FPSCR status bits are also returned by the 'mffs' and 'mffsl' instructions, but they are uniformly ignored by all uses of fegetenv_status. Change the name to be reflective of its current and expected use. Reviewed-By: Paul E Murphy <murphyp@linux.ibm.com>
* [powerpc] __fesetround_inline optimizationsPaul A. Clarke2019-09-271-3/+15
| | | | | | | | | On POWER9, use more efficient means to update the 2-bit rounding mode via the 'mffscrn' instruction (instead of two 'mtfsb0/1' instructions or one 'mtfsfi' instruction that modifies 4 bits). Suggested-by: Paul E. Murphy <murphyp@linux.ibm.com> Reviewed-By: Paul E Murphy <murphyp@linux.ibm.com>
* [powerpc] libc_feupdateenv_test: optimize FPSCR accessPaul A. Clarke2019-09-271-0/+4
| | | | | | | | | | | | ROUND_TO_ODD and a couple of other places use libc_feupdateenv_test to restore the rounding mode and exception enables, preserve exception flags, and test whether given exception(s) were generated. If the exception flags haven't changed, then it is sufficient and a bit more efficient to just restore the rounding mode and enables, rather than writing the full Floating-Point Status and Control Register (FPSCR). Reviewed-by: Paul E. Murphy <murphyp@linux.ibm.com>
* [powerpc] fenv_private.h clean upPaul A. Clarke2019-09-271-0/+20
| | | | | | | | | | | fenv_private.h includes unused functions, magic macro constants, and some replicated common code fragments. Remove unused functions, replace magic constants with constants from fenv_libc.h, and refactor replicated code. Suggested-by: Paul E. Murphy <murphyp@linux.ibm.com> Reviewed-By: Paul E Murphy <murphyp@linux.ibm.com>
* [powerpc] SET_RESTORE_ROUND optimizations and bug fixPaul A. Clarke2019-09-191-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SET_RESTORE_ROUND brackets a block of code, temporarily setting and restoring the rounding mode and letting everything else, including exceptions generated within the block, pass through. On powerpc, the current code clears the exception enables, which will hide exceptions generated within the block. This issue was introduced by me in commit e905212627350d54b58426214b5a54ddc852b0c9. Fix this by not clearing exception enable bits in the prologue. Also, since we are no longer changing the enable bits in either the prologue or the epilogue, there is no need to test for entering/exiting non-stop mode. Also, optimize the prologue get/save/set rounding mode operations for POWER9 and later by using 'mffscrn' when possible. Suggested-by: Paul E. Murphy <murphyp@linux.ibm.com> Reviewed-by: Paul E. Murphy <murphyp@linux.ibm.com> Fixes: e905212627350d54b58426214b5a54ddc852b0c9 2019-09-19 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_and_set_rn): New. (__fe_mffscrn): New. * sysdeps/powerpc/fpu/fenv_private.h (libc_feholdsetround_ppc_ctx): Do not clear enable bits, remove obsolete code, use fegetenv_and_set_rn. (libc_feresetround_ppc): Remove obsolete code, use fegetenv_and_set_rn.
* Prefer https to http for gnu.org and fsf.org URLsPaul Eggert2019-09-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also, change sources.redhat.com to sourceware.org. This patch was automatically generated by running the following shell script, which uses GNU sed, and which avoids modifying files imported from upstream: sed -ri ' s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g ' \ $(find $(git ls-files) -prune -type f \ ! -name '*.po' \ ! -name 'ChangeLog*' \ ! -path COPYING ! -path COPYING.LIB \ ! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \ ! -path manual/texinfo.tex ! -path scripts/config.guess \ ! -path scripts/config.sub ! -path scripts/install-sh \ ! -path scripts/mkinstalldirs ! -path scripts/move-if-change \ ! -path INSTALL ! -path locale/programs/charmap-kw.h \ ! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \ ! '(' -name configure \ -execdir test -f configure.ac -o -f configure.in ';' ')' \ ! '(' -name preconfigure \ -execdir test -f preconfigure.ac ';' ')' \ -print) and then by running 'make dist-prepare' to regenerate files built from the altered files, and then executing the following to cleanup: chmod a+x sysdeps/unix/sysv/linux/riscv/configure # Omit irrelevant whitespace and comment-only changes, # perhaps from a slightly-different Autoconf version. git checkout -f \ sysdeps/csky/configure \ sysdeps/hppa/configure \ sysdeps/riscv/configure \ sysdeps/unix/sysv/linux/csky/configure # Omit changes that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines git checkout -f \ sysdeps/powerpc/powerpc64/ppc-mcount.S \ sysdeps/unix/sysv/linux/s390/s390-64/syscall.S # Omit change that caused a pre-commit check to fail like this: # remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
* [powerpc] fegetenv_status: simplify instruction generationPaul A. Clarke2019-08-281-15/+6
| | | | | | | | | | | | | | fegetenv_status() wants to use the lighter weight instruction 'mffsl' for reading the Floating-Point Status and Control Register (FPSCR). It currently will use it directly if compiled '-mcpu=power9', and will perform a runtime check (cpu_supports("arch_3_00")) otherwise. Nicely, it turns out that the 'mffsl' instruction will decode to 'mffs' on architectures older than "arch_3_00" because the additional bits set for 'mffsl' are "don't care" for 'mffs'. 'mffs' is a superset of 'mffsl'. So, just generate 'mffsl'.
* [powerpc] fe{en,dis}ableexcept, fesetmode: optimize FPSCR accessesPaul A. Clarke2019-08-281-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since fe{en,dis}ableexcept() and fesetmode() read-modify-write just the "mode" (exception enable and rounding mode) bits of the Floating Point Status Control Register (FPSCR), the lighter weight 'mffsl' instruction can be used to read the FPSCR (enables and rounding mode), and 'mtfsf 0b00000011' can be used to write just those bits back to the FPSCR. The net is better performance. In addition, fe{en,dis}ableexcept() read the FPSCR again after writing it, or they determine that it doesn't need to be written because it is not changing. In either case, the local variable holds the current values of the enable bits in the FPSCR. This local variable can be used instead of again reading the FPSCR. Also, that value of the FPSCR which is read the second time is validated against the requested enables. Since the write can't fail, this validation step is unnecessary, and can be removed. Instead, the exceptions to be enabled (or disabled) are transformed into available bits in the FPSCR, then validated after being transformed back, to ensure that all requested bits are actually being set. For example, FE_INVALID_SQRT can be requested, but cannot actually be set. This bit is not mapped during the transformations, so a test for that bit being set before and after transformations will show the bit would not be set, and the function will return -1 for failure. Finally, convert the local macros in fesetmode.c to more generally useful macros in fenv_libc.h.
* [powerpc] fe{en,dis}ableexcept optimize bit translationsPaul A. Clarke2019-08-281-13/+61
| | | | | | | | | | | The exceptions passed to fe{en,dis}ableexcept() are defined in the ABI as a bitmask, a combination of FE_INVALID, FE_OVERFLOW, etc. Within the functions, these bits must be translated to/from the corresponding enable bits in the Floating Point Status Control Register (FPSCR). This translation is currently done bit-by-bit. The compiler generates a series of conditional bit operations. Nicely, the "FE" exception bits are all a uniform offset from the FPSCR enable bits, so the bit-by-bit operation can instead be performed by a shift with appropriate masking.
* [powerpc] fenv_libc.h: protect use of __builtin_cpu_supportsPaul A. Clarke2019-07-091-1/+3
| | | | | | | | | | | | | Using __builtin_cpu_supports() requires support in GCC and Glibc. My recent patch to fenv_libc.h added an unprotected use of __builtin_cpu_supports(). Compilation of Glibc itself will fail with a sufficiently new GCC and sufficiently old Glibc: ../sysdeps/powerpc/fpu/fegetexcept.c: In function ‘__fegetexcept’: ../sysdeps/powerpc/fpu/fenv_libc.h:52:20: error: builtin ‘__builtin_cpu_supports’ needs GLIBC (2.23 and newer) that exports hardware capability bits [-Werror] Reviewed-by: Florian Weimer <fweimer@redhat.com> Fixes 3db85a9814784a74536a1f0e7b7ddbfef7dc84bb.
* powerpc: Use faster means to access FPSCR when possible in some casesPaul A. Clarke2019-06-301-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Using 'mffs' instruction to read the Floating Point Status Control Register (FPSCR) can force a processor flush in some cases, with undesirable performance impact. If the values of the bits in the FPSCR which force the flush are not needed, an instruction that is new to POWER9 (ISA version 3.0), 'mffsl' can be used instead. Cases included: get_rounding_mode, fegetround, fegetmode, fegetexcept. * sysdeps/powerpc/bits/fenvinline.h (__fegetround): Use __fegetround_ISA300() or __fegetround_ISA2() as appropriate. (__fegetround_ISA300) New. (__fegetround_ISA2) New. * sysdeps/powerpc/fpu_control.h (IS_ISA300): New. (_FPU_MFFS): Move implementation... (_FPU_GETCW): Here. (_FPU_MFFSL): Move implementation.... (_FPU_GET_RC_ISA300): Here. New. (_FPU_GET_RC): Use _FPU_GET_RC_ISA300() or _FPU_GETCW() as appropriate. * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_status_ISA300): New. (fegetenv_status): New. * sysdeps/powerpc/fpu/fegetmode.c (fegetmode): Use fegetenv_status() instead of fegetenv_register(). * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Likewise. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
* [powerpc] add 'volatile' to asmPaul A. Clarke2019-06-191-2/+2
| | | | | | | | | | | | | | Add 'volatile' keyword to a few asm statements, to force the compiler to generate the instructions therein. Some instances were implicitly volatile, but adding keyword for consistency. 2019-06-19 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/fpu/fenv_libc.h (relax_fenv_state): Add 'volatile'. * sysdeps/powerpc/fpu/fpu_control.h (__FPU_MFFS): Likewise. (__FPU_MFFSL): Likewise. (_FPU_SETCW): Likewise.
* powerpc: ceil/ceilf refactorAdhemerval Zanella2019-04-291-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patches consolidates all the powerpc ceil{f} implementations on the generic sysdeps/powerpc/fpu/s_ceil{f}. The generic implementation uses either the compiler builts for ISA 2.03+ (which generates the frip instruction) or a generic implementation which uses FP only operations. It adds a generic implementation (round_to_integer.h) which is shared with other rounding to integer routines. The resulting code should be similar in term os performance to previous assembly one. The IFUNC organization for powerpc64 is also change to be enabled only for powerpc64 and not for powerpc64le (since minium ISA of 2.08 does not require the fallback generic implementation). Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/powerpc/fpu/fenv_libc.h (__fesetround_inline_nocheck): New function. * sysdeps/powerpc/fpu/round_to_integer.h: New file. * sysdeps/powerpc/fpu/s_ceil.c: Likewise. * sysdeps/powerpc/fpu/s_ceilf.c: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_ceil.S: Remove file. * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/Makefile (CFLAGS-s_ceil-power5+.c, CFLAGS-s_ceilf-power5+.c): New rule. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceil-power5+.S: Remove file. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceil-ppc32.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceilf-power5+.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceilf-ppc32.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceil-power5+.c: New file. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceil-ppc32.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceilf-power5+.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_ceilf-ppc32.c: Likewise. * sysdeps/powerpc/powerpc32/power5+/fpu/s_ceil.S: Remove file. * sysdeps/powerpc/powerpc32/power5+/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/be/fpu/multiarch/Makefile: New file. * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_ceil-power5+.c: Likewise. * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_ceil-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_ceil.c: Move to ... * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_ceil.c: ... here. * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_ceilf-power5+.c: New file. * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_ceilf-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_ceilf.c: Move to ... * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_ceilf.c: ... * here. * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile (libm-sysdep_routines): Remove s_ceil-power5+, s_ceil-ppc64, s_ceilf-power5+, and s_ceilf-ppc64. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_ceil-power5+.S: Remove file. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_ceil-ppc64.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_ceilf-power5+.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_ceilf-ppc64.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceil.S: Likewise. * sysdeps/powerpc/powerpc64/power5+/fpu/s_ceilf.S: Likewise. Reviewed-by: Gabriel F. T. Gomes <gabriel@inconstante.eti.br>
* [powerpc] Use __builtin_{mffs,mtfsf}Paul A. Clarke2019-03-291-3/+2
| | | | | | | | | | | | | | | | | | | Replace inline asm uses of the "mffs" and "mtfsf" instructions with the analogous GCC builtins. __builtin_mffs and __builtin_mtfsf are both available in GCC 5 and above. Given the minimum GCC level for GLibC is now GCC 6.2, it is safe to use these builtins without restriction. 2019-03-29 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_register): Replace inline asm with builtin. * sysdeps/powerpc/powerpc64/le/fpu/sfp-machine.h (FP_INIT_ROUNDMODE): Likewise. * sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise. (_GET_SI_FPSCR): Likewise. (_SET_SI_FPSCR): Likewise.
* Update copyright dates with scripts/update-copyrights.Joseph Myers2019-01-011-1/+1
| | | | | | | * All files with FSF copyright notices: Update copyright dates using scripts/update-copyrights. * locale/programs/charmap-kw.h: Regenerated. * locale/programs/locfile-kw.h: Likewise.
* Update copyright dates with scripts/update-copyrights.Joseph Myers2018-01-011-1/+1
| | | | | | | * All files with FSF copyright notices: Update copyright dates using scripts/update-copyrights. * locale/programs/charmap-kw.h: Regenerated. * locale/programs/locfile-kw.h: Likewise.
* Update copyright dates with scripts/update-copyrights.Joseph Myers2017-01-011-1/+1
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* Update copyright dates with scripts/update-copyrights.Joseph Myers2016-01-041-1/+1
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* Fix libm fesetround namespace (bug 17748).Joseph Myers2015-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Continuing the fixes for C90 libm functions calling C99 fe* functions, this patch fixes the case of fesetround by making it a weak alias of __fesetround and making the affected code call __fesetround. An existing __fesetround function in fenv_libc.h for powerpc is renamed to __fesetround_inline. Tested for x86_64 (testsuite, and that disassembly of installed shared libraries is unchanged by the patch). Also tested for ARM (soft-float) that fesetround failures disappear from the linknamespace test results (feupdateenv remains to be addressed to complete fixing bug 17748). [BZ #17748] * include/fenv.h (__fesetround): Declare. Use libm_hidden_proto. * math/fesetround.c (fesetround): Rename to __fesetround and define as weak alias of __fesetround. Use libm_hidden_weak. * sysdeps/aarch64/fpu/fesetround.c (fesetround): Likewise. * sysdeps/alpha/fpu/fesetround.c (fesetround): Likewise. * sysdeps/arm/fesetround.c (fesetround): Likewise. * sysdeps/hppa/fpu/fesetround.c (fesetround): Likewise. * sysdeps/i386/fpu/fesetround.c (fesetround): Likewise. * sysdeps/ia64/fpu/fesetround.c (fesetround): Likewise. * sysdeps/m68k/fpu/fesetround.c (fesetround): Likewise. * sysdeps/mips/fpu/fesetround.c (fesetround): Likewise. * sysdeps/powerpc/fpu/fenv_libc.h (__fesetround): Rename to __fesetround_inline. * sysdeps/powerpc/fpu/fenv_private.h (libc_fesetround_ppc): Call __fesetround_inline instead of __fesetround. * sysdeps/powerpc/fpu/fesetround.c (fesetround): Rename to __fesetround and define as weak alias of __fesetround. Use libm_hidden_weak. Call __fesetround_inline instead of __fesetround. * sysdeps/powerpc/nofpu/fesetround.c (fesetround): Rename to __fesetround and define as weak alias of __fesetround. Use libm_hidden_weak. * sysdeps/powerpc/powerpc32/e500/nofpu/fesetround.c (fesetround): Likewise. * sysdeps/s390/fpu/fesetround.c (fesetround): Likewise. * sysdeps/sh/sh4/fpu/fesetround.c (fesetround): Likewise. * sysdeps/sparc/fpu/fesetround.c (fesetround): Likewise. * sysdeps/tile/math_private.h (__fesetround): New inline function. * sysdeps/x86_64/fpu/fesetround.c (fesetround): Rename to __fesetround and define as weak alias of __fesetround. Use libm_hidden_weak. * sysdeps/generic/math_private.h (default_libc_fesetround): Call __fesetround instead of fesetround. (default_libc_feholdexcept_setround): Likewise. (libc_feholdsetround_ctx): Likewise. (libc_feholdsetround_noex_ctx): Likewise.
* Update copyright dates with scripts/update-copyrights.Joseph Myers2015-01-021-1/+1
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* Clean up powerpc fegetround / __fegetround inlines.Joseph Myers2014-12-311-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The natural fix for some linknamespace test failures, where C90 libm functions call C99 <fenv.h> functions, is to make fe* into weak aliases for __fe* and call __fe* from within libm as needed. To do this, the __fe* names need to be available for that purpose - that is, they must not be used for something other than aliases of fe*. On powerpc, however, __fegetround is an inline function in fenv_libc.h, with no corresponding fegetround inline function; fegetround has an equivalent macro expansion in bits/fenvinline.h, but that is disabled if __NO_MATH_INLINES (which is defined for building libm). I see no need for that disabling; it's not even clear that __NO_MATH_INLINES should affect <fenv.h>, and the results of fegetround are completely defined so there is no semantic effect of that disabling at all outside glibc. The x86 inline feraiseexcept is conditioned on __USE_EXTERN_INLINES not __NO_MATH_INLINES (but that's an inline function rather than a macro). This patch removes the __NO_MATH_INLINES conditional on that fegetround macro, so resulting in it being expanded inline inside glibc. In turn, this means that direct calls to __fegetround from C99 functions in ldbl-128ibm can be changed to calls to fegetround, so that nofpu fenv_libc.h files don't need to define __fegetround at all and, by changing ldbl-128ibm files to use <fenv.h> not <fenv_libc.h>, non-e500 nofpu no longer needs an fenv_libc.h file. The other macros in fenvinline.h are left conditional on __NO_MATH_INLINES, although since the only case where this should make a difference is one involving undefined behavior (if the argument to the function is not a valid exception macro). The out-of-line definition for fegetround uses __fegetround (the inline function removed by this patch). So this continues to work, the fenvinline.h header is made to define __fegetround, and then to define fegetround to call __fegetround. Tested for powerpc32 (hard float) that installed stripped shared libraries are unchanged by this patch; also tested that powerpc-nofpu build still works. (This patch does not itself fix any bugs; it simply cleans things up in preparation for separate bug fixes.) * sysdeps/powerpc/bits/fenvinline.h (fegetround): Rename macro to __fegetround and redefine to call __fegetround. Remove condition on [!__NO_MATH_INLINES]. * sysdeps/powerpc/fpu/fenv_libc.h (__fegetround): Remove inline function. * sysdeps/powerpc/nofpu/fenv_libc.h: Remove file. * sysdeps/powerpc/powerpc32/e500/nofpu/fenv_libc.h (__fegetround): Remove macro. * sysdeps/ieee754/ldbl-128ibm/s_llrintl.c: Include <fenv.h> instead of <fenv_libc.h>. (__llrintl): Call fegetround instead of __fegetround. * sysdeps/ieee754/ldbl-128ibm/s_llroundl.c: Include <fenv.h> instead of <fenv_libc.h>. * sysdeps/ieee754/ldbl-128ibm/s_lrintl.c: Likewise. (__lrintl): Call fegetround instead of __fegetround. * sysdeps/ieee754/ldbl-128ibm/s_lroundl.c: Include <fenv.h> instead of <fenv_libc.h>. * sysdeps/ieee754/ldbl-128ibm/s_rintl.c: Likewise. (__rintl): Call fegetround instead of __fegetround.
* PowerPC: Suppress unnecessary FPSCR writeAdhemerval Zanella2014-04-291-0/+17
| | | | | | | This patch optimizes the FPSCR update on exception and rounding change functions by just updating its value if new value if different from current one. It also optimizes fedisableexcept and feenableexcept by removing an unecessary FPSCR read.
* Update copyright notices with scripts/update-copyrightsAllan McRae2014-01-011-1/+1
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* PowerPC: Fix __fe_nomask_env missing symbolAdhemerval Zanella2013-11-261-1/+1
| | | | | This patch fix the missing symbol __fe_nomask_env from commit 41e8926aa4b7f17bc95984737ee82a254ad0911c for GLIBC_2.1.
* PowerPC: Set/restore rounding mode only when neededAdhemerval Zanella2013-11-251-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch helps some math functions performance by adding the libc_fexxx variant of inline functions to handle both FPU round and exception set/restore and by using them on the libc_fexxx_ctx functions. It is based on already coded fexxx family functions for PPC with fpu. Here is the summary of performance improvements due this patch (measured on a POWER7 machine): Before: cos(): ITERS:9.5895e+07: TOTAL:5116.03Mcy, MAX:77.6cy, MIN:49.792cy, 18744 calls/Mcy exp(): ITERS:2.827e+07: TOTAL:5187.15Mcy, MAX:494.018cy, MIN:38.422cy, 5450.01 calls/Mcy pow(): ITERS:6.1705e+07: TOTAL:5144.26Mcy, MAX:171.95cy, MIN:29.935cy, 11994.9 calls/Mcy sin(): ITERS:8.6898e+07: TOTAL:5117.06Mcy, MAX:83.841cy, MIN:46.582cy, 16982 calls/Mcy tan(): ITERS:2.9473e+07: TOTAL:5115.39Mcy, MAX:191.017cy, MIN:172.352cy, 5761.63 calls/Mcy After: cos(): ITERS:2.05265e+08: TOTAL:5111.37Mcy, MAX:78.754cy, MIN:24.196cy, 40158.5 calls/Mcy exp(): ITERS:3.341e+07: TOTAL:5170.84Mcy, MAX:476.317cy, MIN:15.574cy, 6461.23 calls/Mcy pow(): ITERS:7.6153e+07: TOTAL:5129.1Mcy, MAX:147.5cy, MIN:30.916cy, 14847.2 calls/Mcy sin(): ITERS:1.58816e+08: TOTAL:5115.11Mcy, MAX:1490.39cy, MIN:22.341cy, 31048.4 calls/Mcy tan(): ITERS:3.4964e+07: TOTAL:5114.18Mcy, MAX:177.422cy, MIN:146.115cy, 6836.68 calls/Mcy
* PowerPC: Fix __fe_mask_env exportAdhemerval Zanella2013-11-131-1/+3
| | | | | This patch does not export __fe_mask_env anymore, only providing a compatibility symbol. It fixes BZ#14143.
* PowerPC floating point little-endian [8 of 15]Anton Blanchard2013-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-07/msg00199.html Corrects floating-point environment code for little-endian. * sysdeps/powerpc/fpu/fenv_libc.h (fenv_union_t): Replace int array with long long. * sysdeps/powerpc/fpu/e_sqrt.c (__slow_ieee754_sqrt): Adjust. * sysdeps/powerpc/fpu/e_sqrtf.c (__slow_ieee754_sqrtf): Adjust. * sysdeps/powerpc/fpu/fclrexcpt.c (__feclearexcept): Adjust. * sysdeps/powerpc/fpu/fedisblxcpt.c (fedisableexcept): Adjust. * sysdeps/powerpc/fpu/feenablxcpt.c (feenableexcept): Adjust. * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Adjust. * sysdeps/powerpc/fpu/feholdexcpt.c (feholdexcept): Adjust. * sysdeps/powerpc/fpu/fesetenv.c (__fesetenv): Adjust. * sysdeps/powerpc/fpu/feupdateenv.c (__feupdateenv): Adjust. * sysdeps/powerpc/fpu/fgetexcptflg.c (__fegetexceptflag): Adjust. * sysdeps/powerpc/fpu/fraiseexcpt.c (__feraiseexcept): Adjust. * sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Adjust. * sysdeps/powerpc/fpu/ftestexcept.c (fetestexcept): Adjust.
* Better distinguish between NaN/qNaN/sNaN.Thomas Schwinge2013-03-151-2/+2
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* Update copyright notices with scripts/update-copyrights.Joseph Myers2013-01-021-1/+1
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* Replace FSF snail mail address with URLs.Paul Eggert2012-02-091-3/+2
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* * sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S: UseUlrich Drepper2009-03-101-4/+8
| | | | | | | | | | | | | .machine push; .machine "power6" and .machine pop around mtfsf insns outside of _ARCH_PWR6 define. * sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S: Likewise. * sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_SET_DI_FPSCR): Likewise. * sysdeps/powerpc/fpu/fenv_libc.h (fesetenv_register, relax_fenv_state): Likewise.
* [BZ #6411]Ulrich Drepper2008-11-171-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2008-11-13 Ryan S. Arnold <rsa@us.ibm.com> [BZ #6411] * sysdeps/powerpc/fpu/Makefile: Added test case tst-setcontext-fpscr. * sysdeps/powerpc/fpu/feholdexcpt.c (_FPU_MASK_ALL): Define to replace magic numbers. * sysdeps/powerpc/fpu/fenv_libc.h (fesetenv_register): Dynamically choose mtfsf insn based on PPC_FEATURE_HAS_DFP. (relax_fenv_state): Same as above. (FPSCR_29): Reserve bit in ISA 2.05. (FPSCR_NI): Provide define for compat. * sysdeps/powerpc/fpu/fesetenv.c (_FPU_MASK_ALL): Define to replace magic numbers. * sysdeps/powerpc/fpu/feupdateenv.c (_FPU_MASK_ALL): Define to replace magic numbers. * sysdeps/powerpc/fpu/tst-setcontext-fpscr.c: New file. Test case to test setcontext and swapcontext with dynamic 64-bit FPSCR detection. * sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S (__longjmp): Adjust access to hwcap to account for hwcap size increase to uint64_t. * sysdeps/powerpc/powerpc32/fpu/setjmp-common.S (__sigsetjmp ): Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext-common.S (*setcontext): Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/power6/fpu/setcontext.S: New file. * sysdeps/unix/sysv/linux/powerpc/powerpc32/power6/fpu/swapcontext.S: New file. * sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S (*setcontext): dynamically select mtfsf insn based on PPC_FEATURE_HAS_DFP. Adjust access to hwcap to account for hwcap size increase to uint64_t. * sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S (*swapcontext): dynamically select mtfsf insn based on PPC_FEATURE_HAS_DFP. Adjust access to hwcap to account for hwcap size increase to uint64_t. * sysdeps/unix/sysv/linux/powerpc/powerpc64/power6/fpu/setcontext.S: New file. * sysdeps/unix/sysv/linux/powerpc/powerpc64/power6/fpu/swapcontext.S: New file. * sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S (*setcontext): dynamically select mtfsf insn based on PPC_FEATURE_HAS_DFP. * sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S (*swapcontext): dynamically select mtfsf insn based on PPC_FEATURE_HAS_DFP.
* * sysdeps/powerpc/fpu/fenv_libc.h: Add libm_hidden_proto forUlrich Drepper2008-04-121-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __fe_nomask_env. * sysdeps/powerpc/fpu/fe_nomask.c: Add libm_hidden_def. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/fe_nomask.c: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/fpu/fe_nomask.c: Likewise. * sysdeps/powerpc/bits/fenv.h: Make safe for C++. * sysdeps/unix/sysv/linux/powerpc/bits/mathinline.h: New file. * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Rename function from fegetexcept and make old name weak alias. * include/fenv.h: Declare __fegetexcept. * sysdeps/powerpc/fpu/fedisblxcpt.c: Use __fegetexcept instead of fegetexcept. * sysdeps/powerpc/fpu/feenablxcpt.c: Likewise. * sysdeps/powerpc/fpu/fraiseexcpt.c (__feraiseexcept): Avoid call to fetestexcept. * sysdeps/ieee754/ldbl-128ibm/s_log1pl.c (__log1pl): Use __frexpl instead of frexpl to avoid local PLT. * math/s_significandl.c (__significandl): Use __ilogbl instead of ilogbl to avoid local PLT. * sysdeps/ieee754/ldbl-128ibm/s_expm1l.c (__expm1l): Use __ldexpl instead of ldexpl to avoid local PLT. * sysdeps/ieee754/ldbl-128ibm/e_expl.c (__ieee754_expl): Use __roundl not roundl to avoid local PLT. * sysdeps/ieee754/ldbl-128/e_j0l.c: Use function names which avoid local PLTs. Use __sincosl instead of separate sinl and cosl calls. * sysdeps/ieee754/ldbl-128/e_j1l.c: Likewise.
* [BZ #2423]Roland McGrath2006-03-161-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2006-03-07 Jakub Jelinek <jakub@redhat.com> [BZ #2423] * math/libm-test.inc [TEST_LDOUBLE] (ceil_test, floor_test, rint_test, round_test, trunc_test): Only run some of the new tests if LDBL_MANT_DIG > 100. 2006-03-03 Steven Munroe <sjmunroe@us.ibm.com> Alan Modra <amodra@bigpond.net.au> * sysdeps/powerpc/fpu/fenv_libc.h (__fegetround, __fesetround): Define inline implementations. * sysdeps/powerpc/fpu/fegetround.c: Use __fegetround. * sysdeps/powerpc/fpu/fesetround.c: Use __fesetround. * sysdeps/powerpc/fpu/math_ldbl.h: New file. [BZ #2423] * math/libm-test.inc [TEST_LDOUBLE] (ceil_test, floor_test, rint_test, round_test, trunc_test): Add new tests. * sysdeps/ieee754/ldbl-128ibm/math_ldbl.h (EXTRACT_IBM_EXTENDED_MANTISSA, INSERT_IBM_EXTENDED_MANTISSA): Removed, replaced with ... (ldbl_extract_mantissa, ldbl_insert_mantissa, ldbl_pack, ldbl_unpack, ldbl_canonicalise, ldbl_nearbyint): New functions. * sysdeps/ieee754/ldbl-128ibm/e_fmodl.c (__ieee754_fmodl): Replace EXTRACT_IBM_EXTENDED_MANTISSA and INSERT_IBM_EXTENDED_MANTISSA with ldbl_extract_mantissa and ldbl_insert_mantissa. * sysdeps/ieee754/ldbl-128ibm/e_rem_pio2l.c (__ieee754_rem_pio2l): Replace EXTRACT_IBM_EXTENDED_MANTISSA with ldbl_extract_mantissa. (ldbl_extract_mantissa, ldbl_insert_mantissa): New inline functions. * sysdeps/ieee754/ldbl-128ibm/s_ceill.c (__ceill): Handle rounding that spans doubles in IBM long double format. * sysdeps/ieee754/ldbl-128ibm/s_floorl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_rintl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_roundl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_truncl.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintl.S: File removed.
* (CFLAGS-tst-align.c): Add -mpreferred-stack-boundary=4.Ulrich Drepper2004-12-221-36/+1
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* 2.5-18.1Jakub Jelinek2007-07-121-1/+36
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* Update to LGPL v2.1.Andreas Jaeger2001-07-061-8/+8
| | | | | | | | | | | | | | 2001-07-06 Paul Eggert <eggert@twinsun.com> * manual/argp.texi: Remove ignored LGPL copyright notice; it's not appropriate for documentation anyway. * manual/libc-texinfo.sh: "Library General Public License" -> "Lesser General Public License". 2001-07-06 Andreas Jaeger <aj@suse.de> * All files under GPL/LGPL version 2: Place under LGPL version 2.1.
* Update.Ulrich Drepper1999-10-311-0/+106
* Versions.def (libm): Add GLIBC_2.1.3. ISO C99 TR1 changes various fe* functions to return an error value. * math/Versions [GLIBC_2.1.3]: Add feclearexcept, fegetexceptflag, feraiseexcept, fesetexceptflag, fegetenv, fesetenv, and feupdateenv. * sysdeps/alpha/fpu/fclrexcpt.c: Return value and add alias. * sysdeps/alpha/fpu/fegetenv.c: Likewise. * sysdeps/alpha/fpu/fesetenv.c: Likewise. * sysdeps/alpha/fpu/feupdateenv.c: Likewise. * sysdeps/alpha/fpu/fgetexcptflg.c: Likewise. * sysdeps/alpha/fpu/fraiseexcpt.c: Likewise. * sysdeps/alpha/fpu/fsetexcptflg.c: Likewise. * sysdeps/arm/fpu/fclrexcpt.c: Likewise. * sysdeps/arm/fpu/fegetenv.c: Likewise. * sysdeps/arm/fpu/fesetenv.c: Likewise. * sysdeps/arm/fpu/fraiseexcpt.c: Likewise. * sysdeps/arm/fpu/fsetexcptflg.c: Likewise. * sysdeps/generic/fclrexcpt.c: Likewise. * sysdeps/generic/fegetenv.c: Likewise. * sysdeps/generic/fesetenv.c: Likewise. * sysdeps/generic/feupdateenv.c: Likewise. * sysdeps/generic/fgetexcptflg.c: Likewise. * sysdeps/generic/fraiseexcpt.c: Likewise. * sysdeps/generic/fsetexcptflg.c: Likewise. * sysdeps/i386/fpu/fclrexcpt.c: Likewise. * sysdeps/i386/fpu/fegetenv.c: Likewise. * sysdeps/i386/fpu/fesetenv.c: Likewise. * sysdeps/i386/fpu/feupdateenv.c: Likewise. * sysdeps/i386/fpu/fgetexcptflg.c: Likewise. * sysdeps/i386/fpu/fraiseexcpt.c: Likewise. * sysdeps/i386/fpu/fsetexcptflg.c: Likewise. * sysdeps/m68k/fpu/fclrexcpt.c: Likewise. * sysdeps/m68k/fpu/fegetenv.c: Likewise. * sysdeps/m68k/fpu/fesetenv.c: Likewise. * sysdeps/m68k/fpu/feupdateenv.c: Likewise. * sysdeps/m68k/fpu/fgetexcptflg.c: Likewise. * sysdeps/m68k/fpu/fraiseexcpt.c: Likewise. * sysdeps/m68k/fpu/fsetexcptflg.c: Likewise. * sysdeps/mips/fclrexcpt.c: Likewise. * sysdeps/mips/fegetenv.c: Likewise. * sysdeps/mips/fesetenv.c: Likewise. * sysdeps/mips/feupdateenv.c: Likewise. * sysdeps/mips/fgetexcptflg.c: Likewise. * sysdeps/powerpc/fclrexcpt.c: Likewise. * sysdeps/powerpc/fegetenv.c: Likewise. * sysdeps/powerpc/fesetenv.c: Likewise. * sysdeps/powerpc/feupdateenv.c: Likewise. * sysdeps/powerpc/fgetexcptflg.c: Likewise. * sysdeps/powerpc/fraiseexcpt.c: Likewise. * sysdeps/powerpc/fsetexcptflg.c: Likewise. * sysdeps/sparc/fpu/fclrexcpt.c: Likewise. * sysdeps/sparc/fpu/fegetenv.c: Likewise. * sysdeps/sparc/fpu/fesetenv.c: Likewise. * sysdeps/sparc/fpu/feupdateenv.c: Likewise. * sysdeps/sparc/fpu/fgetexcptflg.c: Likewise. * sysdeps/sparc/fpu/fraiseexcpt.c: Likewise. * sysdeps/sparc/fpu/fsetexcptflg.c: Likewise. * math/fenv.h: Adjust prototypes.: Likewise. * manual/arith.texi: Adjust documentation for these changes. * manual/arith.texi: Document feraiseexcept. * sysdeps/powerpc/fegetenv.c: Moved to... * sysdeps/powerpc/fpu/fegetenv.c: ...here. * sysdeps/powerpc/fegetround.c: Moved to... * sysdeps/powerpc/fpu/fegetround.c: ...here. * sysdeps/powerpc/feholdexcpt.c: Moved to... * sysdeps/powerpc/fpu/feholdexcpt.c: ...here. * sysdeps/powerpc/fesetenv.c: Moved to... * sysdeps/powerpc/fpu/fesetenv.c: ...here. * sysdeps/powerpc/fenv_libc.h: Moved to... * sysdeps/powerpc/fpu/fenv_libc.h: ...here. * sysdeps/powerpc/feupdateenv.c: Moved to... * sysdeps/powerpc/fpu/feupdateenv.c: ...here. * sysdeps/powerpc/fgetexcptflg.c: Moved to... * sysdeps/powerpc/fpu/fgetexcptflg.c: ...here. * sysdeps/powerpc/fraiseexcpt.c: Moved to... * sysdeps/powerpc/fpu/fraiseexcpt.c: ...here. * sysdeps/powerpc/fsetexcptflg.c: Moved to... * sysdeps/powerpc/fpu/fsetexcptflg.c: ...here. * sysdeps/powerpc/ftestexcept.c: Moved to... * sysdeps/powerpc/fpu/ftestexcept.c: ...here. * sysdeps/powerpc/fesetround.c: Moved to... * sysdeps/powerpc/fpu/fesetround.c: ...here * sysdeps/powerpc/fenv_const.c: Moved to... * sysdeps/powerpc/fpu/fenv_const.c: ...here. 1999-10-29 Jakub Jelinek <jakub@redhat.com> * stdlib/longlong.h: Avoid UDIV_TIME redefinition. * sysdeps/sparc/sparc32/dl-machine.h: Fix loading of SPARC v8plus libraries from statically linked programs. * sysdeps/unix/sysv/linux/sparc/bits/sigaction.h: POSIX 199309 fix for sigaction on SPARC. Patches by David S. Miller <davem@redhat.com>. * sysdeps/unix/sysv/linux/sparc/sys/ucontext.h: Declare gregset_t and other required structures and defines for SPARC 64bit ABI as well, not only 32bit ABI. 1999-10-31 Andreas Jaeger <aj@suse.de> * sysdeps/sparc/sparc64/fpu/bits/huge_val.h: Replace __USE_ISOC9X by __USE_ISOC99 and update comments. * math/complex.h: Update comments for ISO C99. * math/fenv.h: Likewise. * math/test-fenv.c: Likewise. * math/tgmath.h: Likewise. * libio/stdio.h: Likewise. * posix/sys/types.h: Likewise. * sysdeps/generic/inttypes.h: Likewise. * sysdeps/generic/stdint.h: Likewise. 1999-10-31 Ulrich Drepper <drepper@cygnus.com>
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