| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | aarch64: Use memcpy_simd as the default memcpy | Wilco Dijkstra | 2024-04-11 | 1 | -5/+1 |
| * | AArch64: Use __memcpy_simd on Neoverse N2/V1 | Wilco Dijkstra | 2020-10-14 | 1 | -1/+2 |
| * | AArch64: Rename IS_ARES to IS_NEOVERSE_N1 | Wilco Dijkstra | 2020-10-14 | 1 | -1/+3 |
| * | AArch64: Add optimized Q-register memcpy | Wilco Dijkstra | 2020-10-14 | 1 | -2/+3 |
| * | [AArch64] Add ifunc support for Ares | Wilco Dijkstra | 2019-09-06 | 1 | -1/+1 |
| * | aarch64: add HXT Phecda core memory operation ifuncs | Hongbo Zhang | 2018-06-12 | 1 | -1/+1 |
| * | IFUNC for Cavium ThunderX2 | Steve Ellcey | 2018-02-22 | 1 | -1/+4 |
| * | Update copyright dates with scripts/update-copyrights. | Joseph Myers | 2018-01-01 | 1 | -1/+1 |
| * | aarch64: Optimized memcpy for Qualcomm Falkor processor | Siddhesh Poyarekar | 2017-08-09 | 1 | -1/+6 |
| * | aarch64: Thunderx specific memcpy and memmove | Steve Ellcey | 2017-05-24 | 1 | -0/+39 |
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index : mirror/glibc | |
| mirror of git://sourceware.org/git/glibc.git | Leah Neukirchen |
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