diff options
Diffstat (limited to 'sysdeps')
| -rw-r--r-- | sysdeps/generic/dl-cache.h | 8 | ||||
| -rw-r--r-- | sysdeps/i386/bits/atomic.h | 393 | ||||
| -rw-r--r-- | sysdeps/ia64/Makefile | 4 | ||||
| -rw-r--r-- | sysdeps/ia64/ia64libgcc.S | 350 | ||||
| -rw-r--r-- | sysdeps/ia64/libgcc-compat.c | 84 | ||||
| -rw-r--r-- | sysdeps/unix/alpha/sysdep.h | 19 | ||||
| -rw-r--r-- | sysdeps/unix/nice.c | 7 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/i386/dl-cache.h | 59 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/ia64/dl-cache.h | 27 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/ia64/dl-procinfo.c | 5 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/ia64/dl-procinfo.h | 5 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/ia64/ldd-rewrite.sed | 2 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/paths.h | 2 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/s390/s390-32/sysdep.h | 17 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/s390/s390-64/sysdep.h | 17 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/sparc/sparc32/setresgid.c | 1 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/sparc/sparc32/setresuid.c | 1 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/sparc/sysdep.h | 22 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/tcsetattr.c | 32 |
19 files changed, 676 insertions, 379 deletions
diff --git a/sysdeps/generic/dl-cache.h b/sysdeps/generic/dl-cache.h index c2b72874cf..7cc02d993b 100644 --- a/sysdeps/generic/dl-cache.h +++ b/sysdeps/generic/dl-cache.h @@ -36,6 +36,14 @@ # define add_system_dir(dir) add_dir (dir) #endif +#ifndef arch_startup +# define arch_startup(argc, argv) do { } while (0) +#endif + +#ifndef add_arch_dirs +# define add_arch_dirs(config_file) do { } while (0) +#endif + #define CACHEMAGIC "ld.so-1.7.0" /* libc5 and glibc 2.0/2.1 use the same format. For glibc 2.2 another diff --git a/sysdeps/i386/bits/atomic.h b/sysdeps/i386/bits/atomic.h new file mode 100644 index 0000000000..d8aa448d7d --- /dev/null +++ b/sysdeps/i386/bits/atomic.h @@ -0,0 +1,393 @@ +/* Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Ulrich Drepper <drepper@redhat.com>, 2002. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <stdint.h> + + +typedef int8_t atomic8_t; +typedef uint8_t uatomic8_t; +typedef int_fast8_t atomic_fast8_t; +typedef uint_fast8_t uatomic_fast8_t; + +typedef int16_t atomic16_t; +typedef uint16_t uatomic16_t; +typedef int_fast16_t atomic_fast16_t; +typedef uint_fast16_t uatomic_fast16_t; + +typedef int32_t atomic32_t; +typedef uint32_t uatomic32_t; +typedef int_fast32_t atomic_fast32_t; +typedef uint_fast32_t uatomic_fast32_t; + +typedef int64_t atomic64_t; +typedef uint64_t uatomic64_t; +typedef int_fast64_t atomic_fast64_t; +typedef uint_fast64_t uatomic_fast64_t; + +typedef intptr_t atomicptr_t; +typedef uintptr_t uatomicptr_t; +typedef intmax_t atomic_max_t; +typedef uintmax_t uatomic_max_t; + + +#ifndef LOCK_PREFIX +# ifdef UP +# define LOCK_PREFIX /* nothing */ +# else +# define LOCK_PREFIX "lock;" +# endif +#endif + +/* i386 doesn't have cmpxchg* and xadd*. Instead of being completely + non-atomic, atomic_* macros that are using solely i386 instructions + are using those atomic instructions and the remaining ones are + non-atomic. When in nscd, use i486+ instructions if on i486+. */ + +#ifdef IS_IN_nscd + +extern int has_cmpxchg attribute_hidden; + +#define atomic_supports_shared has_cmpxchg + +#define atomic_init_nscd \ +int has_cmpxchg attribute_hidden; \ +static void __attribute__((constructor)) \ +init_has_cmpxchg (void) \ +{ \ + int fl1, fl2; \ + __asm__ ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;" \ + "pushl %0; popfl; pushfl; popl %0; popfl" \ + : "=&r" (fl1), "=&r" (fl2) : "i" (0x00040000)); \ + if ((fl1 ^ fl2) & 0x00040000) \ + has_cmpxchg = 1; \ +} + +# define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + if (__builtin_expect (has_cmpxchg, 1)) \ + __asm __volatile (LOCK_PREFIX "cmpxchgb %b2, %1" \ + : "=a" (ret), "=m" (*mem) \ + : "q" (newval), "m" (*mem), "0" (oldval)); \ + else \ + { \ + ret = *mem; \ + if (ret == oldval) \ + *mem = (newval); \ + } \ + ret; }) + +# define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + if (__builtin_expect (has_cmpxchg, 1)) \ + __asm __volatile (LOCK_PREFIX "cmpxchgw %w2, %1" \ + : "=a" (ret), "=m" (*mem) \ + : "r" (newval), "m" (*mem), "0" (oldval)); \ + ret; }) + +# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + if (__builtin_expect (has_cmpxchg, 1)) \ + __asm __volatile (LOCK_PREFIX "cmpxchgl %2, %1" \ + : "=a" (ret), "=m" (*mem) \ + : "r" (newval), "m" (*mem), "0" (oldval)); \ + ret; }) + +/* XXX We do not really need 64-bit compare-and-exchange. At least + not in the moment. */ +# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret = *(mem); abort (); ret = (newval); ret = (oldval); }) + + +# define atomic_exchange_and_add(mem, value) \ + ({ __typeof (*mem) __result; \ + __typeof (value) __addval = (value); \ + if (__builtin_expect (! has_cmpxchg, 0)) \ + { \ + __typeof (mem) __memp = (mem); \ + __result = *__memp; \ + *__memp += __addval; \ + } \ + else if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "xaddb %b0, %1" \ + : "=r" (__result), "=m" (*mem) \ + : "0" (__addval), "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "xaddw %w0, %1" \ + : "=r" (__result), "=m" (*mem) \ + : "0" (__addval), "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "xaddl %0, %1" \ + : "=r" (__result), "=m" (*mem) \ + : "0" (__addval), "m" (*mem)); \ + else \ + { \ + __typeof (mem) __memp = (mem); \ + __typeof (*mem) __tmpval; \ + __result = *__memp; \ + do \ + __tmpval = __result; \ + while ((__result = __arch_compare_and_exchange_val_64_acq \ + (__memp, __result + __addval, __result)) == __tmpval); \ + } \ + __result; }) + +#else + +/* We have by default no support for atomic operations. So define + them non-atomic. If this is a problem somebody will have to come + up with real definitions. */ + +/* The only basic operation needed is compare and exchange. */ +#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \ + ({ __typeof (mem) __gmemp = (mem); \ + __typeof (*mem) __gret = *__gmemp; \ + __typeof (*mem) __gnewval = (newval); \ + \ + if (__gret == (oldval)) \ + *__gmemp = __gnewval; \ + __gret; }) + +#define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \ + ({ __typeof (mem) __gmemp = (mem); \ + __typeof (*mem) __gnewval = (newval); \ + \ + *__gmemp == (oldval) ? (*__gmemp = __gnewval, 0) : 1; }) + +#endif + +/* Note that we need no lock prefix. */ +#define atomic_exchange_acq(mem, newvalue) \ + ({ __typeof (*mem) result; \ + if (sizeof (*mem) == 1) \ + __asm __volatile ("xchgb %b0, %1" \ + : "=r" (result), "=m" (*mem) \ + : "0" (newvalue), "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile ("xchgw %w0, %1" \ + : "=r" (result), "=m" (*mem) \ + : "0" (newvalue), "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile ("xchgl %0, %1" \ + : "=r" (result), "=m" (*mem) \ + : "0" (newvalue), "m" (*mem)); \ + else \ + { \ + result = 0; \ + abort (); \ + } \ + result; }) + + +#define atomic_add(mem, value) \ + (void) ({ if (__builtin_constant_p (value) && (value) == 1) \ + atomic_increment (mem); \ + else if (__builtin_constant_p (value) && (value) == -1) \ + atomic_decrement (mem); \ + else if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "addb %b1, %0" \ + : "=m" (*mem) \ + : "ir" (value), "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "addw %w1, %0" \ + : "=m" (*mem) \ + : "ir" (value), "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "addl %1, %0" \ + : "=m" (*mem) \ + : "ir" (value), "m" (*mem)); \ + else \ + { \ + __typeof (value) __addval = (value); \ + __typeof (mem) __memp = (mem); \ + __typeof (*mem) __oldval = *__memp; \ + __typeof (*mem) __tmpval; \ + do \ + __tmpval = __oldval; \ + while ((__oldval = __arch_compare_and_exchange_val_64_acq \ + (__memp, __oldval + __addval, __oldval)) == __tmpval); \ + } \ + }) + + +#define atomic_add_negative(mem, value) \ + ({ unsigned char __result; \ + if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "addb %b2, %0; sets %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "iq" (value), "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "addw %w2, %0; sets %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "ir" (value), "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "addl %2, %0; sets %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "ir" (value), "m" (*mem)); \ + else \ + abort (); \ + __result; }) + + +#define atomic_add_zero(mem, value) \ + ({ unsigned char __result; \ + if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "addb %b2, %0; setz %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "ir" (value), "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "addw %w2, %0; setz %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "ir" (value), "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "addl %2, %0; setz %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "ir" (value), "m" (*mem)); \ + else \ + abort (); \ + __result; }) + + +#define atomic_increment(mem) \ + (void) ({ if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "incb %b0" \ + : "=m" (*mem) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "incw %w0" \ + : "=m" (*mem) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "incl %0" \ + : "=m" (*mem) \ + : "m" (*mem)); \ + else \ + { \ + __typeof (mem) __memp = (mem); \ + __typeof (*mem) __oldval = *__memp; \ + __typeof (*mem) __tmpval; \ + do \ + __tmpval = __oldval; \ + while ((__oldval = __arch_compare_and_exchange_val_64_acq \ + (__memp, __oldval + 1, __oldval)) == __tmpval); \ + } \ + }) + + +#define atomic_increment_and_test(mem) \ + ({ unsigned char __result; \ + if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "incb %0; sete %b1" \ + : "=m" (*mem), "=qm" (__result) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "incw %0; sete %w1" \ + : "=m" (*mem), "=qm" (__result) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "incl %0; sete %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "m" (*mem)); \ + else \ + abort (); \ + __result; }) + + +#define atomic_decrement(mem) \ + (void) ({ if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "decb %b0" \ + : "=m" (*mem) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "decw %w0" \ + : "=m" (*mem) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "decl %0" \ + : "=m" (*mem) \ + : "m" (*mem)); \ + else \ + { \ + __typeof (mem) __memp = (mem); \ + __typeof (*mem) __oldval = *__memp; \ + __typeof (*mem) __tmpval; \ + do \ + __tmpval = __oldval; \ + while ((__oldval = __arch_compare_and_exchange_val_64_acq \ + (__memp, __oldval - 1, __oldval)) == __tmpval); \ + } \ + }) + + +#define atomic_decrement_and_test(mem) \ + ({ unsigned char __result; \ + if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "decb %b0; sete %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "decw %w0; sete %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "decl %0; sete %1" \ + : "=m" (*mem), "=qm" (__result) \ + : "m" (*mem)); \ + else \ + abort (); \ + __result; }) + + +#define atomic_bit_set(mem, bit) \ + (void) ({ if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "orb %b2, %0" \ + : "=m" (*mem) \ + : "m" (*mem), "ir" (1 << (bit))); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "orw %w2, %0" \ + : "=m" (*mem) \ + : "m" (*mem), "ir" (1 << (bit))); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "orl %2, %0" \ + : "=m" (*mem) \ + : "m" (*mem), "ir" (1 << (bit))); \ + else \ + abort (); \ + }) + + +#define atomic_bit_test_set(mem, bit) \ + ({ unsigned char __result; \ + if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "btsb %3, %1; setc %0" \ + : "=q" (__result), "=m" (*mem) \ + : "m" (*mem), "ir" (bit)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "btsw %3, %1; setc %0" \ + : "=q" (__result), "=m" (*mem) \ + : "m" (*mem), "ir" (bit)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "btsl %3, %1; setc %0" \ + : "=q" (__result), "=m" (*mem) \ + : "m" (*mem), "ir" (bit)); \ + else \ + abort (); \ + __result; }) + + +#define atomic_delay() asm ("rep; nop") diff --git a/sysdeps/ia64/Makefile b/sysdeps/ia64/Makefile index 2ea937ac9e..bf43c96144 100644 --- a/sysdeps/ia64/Makefile +++ b/sysdeps/ia64/Makefile @@ -12,8 +12,8 @@ elide-routines.os += hp-timing ifeq (yes,$(build-shared)) # Compatibility -sysdep_routines += ia64libgcc -shared-only-routines += ia64libgcc +sysdep_routines += libgcc-compat +shared-only-routines += libgcc-compat endif endif diff --git a/sysdeps/ia64/ia64libgcc.S b/sysdeps/ia64/ia64libgcc.S index 3f77b06a5a..e69de29bb2 100644 --- a/sysdeps/ia64/ia64libgcc.S +++ b/sysdeps/ia64/ia64libgcc.S @@ -1,350 +0,0 @@ -/* From the Intel IA-64 Optimization Guide, choose the minimum latency - alternative. */ - -#include <sysdep.h> -#undef ret - -#include <shlib-compat.h> - -#if SHLIB_COMPAT(libc, GLIBC_2_2, GLIBC_2_2_6) - -/* __divtf3 - Compute a 80-bit IEEE double-extended quotient. - farg0 holds the dividend. farg1 holds the divisor. */ - -ENTRY(___divtf3) - cmp.eq p7, p0 = r0, r0 - frcpa.s0 f10, p6 = farg0, farg1 - ;; -(p6) cmp.ne p7, p0 = r0, r0 - .pred.rel.mutex p6, p7 -(p6) fnma.s1 f11 = farg1, f10, f1 -(p6) fma.s1 f12 = farg0, f10, f0 - ;; -(p6) fma.s1 f13 = f11, f11, f0 -(p6) fma.s1 f14 = f11, f11, f11 - ;; -(p6) fma.s1 f11 = f13, f13, f11 -(p6) fma.s1 f13 = f14, f10, f10 - ;; -(p6) fma.s1 f10 = f13, f11, f10 -(p6) fnma.s1 f11 = farg1, f12, farg0 - ;; -(p6) fma.s1 f11 = f11, f10, f12 -(p6) fnma.s1 f12 = farg1, f10, f1 - ;; -(p6) fma.s1 f10 = f12, f10, f10 -(p6) fnma.s1 f12 = farg1, f11, farg0 - ;; -(p6) fma.s0 fret0 = f12, f10, f11 -(p7) mov fret0 = f10 - br.ret.sptk rp -END(___divtf3) - .symver ___divtf3, __divtf3@GLIBC_2.2 - -/* __divdf3 - Compute a 64-bit IEEE double quotient. - farg0 holds the dividend. farg1 holds the divisor. */ - -ENTRY(___divdf3) - cmp.eq p7, p0 = r0, r0 - frcpa.s0 f10, p6 = farg0, farg1 - ;; -(p6) cmp.ne p7, p0 = r0, r0 - .pred.rel.mutex p6, p7 -(p6) fmpy.s1 f11 = farg0, f10 -(p6) fnma.s1 f12 = farg1, f10, f1 - ;; -(p6) fma.s1 f11 = f12, f11, f11 -(p6) fmpy.s1 f13 = f12, f12 - ;; -(p6) fma.s1 f10 = f12, f10, f10 -(p6) fma.s1 f11 = f13, f11, f11 - ;; -(p6) fmpy.s1 f12 = f13, f13 -(p6) fma.s1 f10 = f13, f10, f10 - ;; -(p6) fma.d.s1 f11 = f12, f11, f11 -(p6) fma.s1 f10 = f12, f10, f10 - ;; -(p6) fnma.d.s1 f8 = farg1, f11, farg0 - ;; -(p6) fma.d fret0 = f8, f10, f11 -(p7) mov fret0 = f10 - br.ret.sptk rp - ;; -END(___divdf3) - .symver ___divdf3, __divdf3@GLIBC_2.2 - -/* __divsf3 - Compute a 32-bit IEEE float quotient. - farg0 holds the dividend. farg1 holds the divisor. */ - -ENTRY(___divsf3) - cmp.eq p7, p0 = r0, r0 - frcpa.s0 f10, p6 = farg0, farg1 - ;; -(p6) cmp.ne p7, p0 = r0, r0 - .pred.rel.mutex p6, p7 -(p6) fmpy.s1 f8 = farg0, f10 -(p6) fnma.s1 f9 = farg1, f10, f1 - ;; -(p6) fma.s1 f8 = f9, f8, f8 -(p6) fmpy.s1 f9 = f9, f9 - ;; -(p6) fma.s1 f8 = f9, f8, f8 -(p6) fmpy.s1 f9 = f9, f9 - ;; -(p6) fma.d.s1 f10 = f9, f8, f8 - ;; -(p6) fnorm.s.s0 fret0 = f10 -(p7) mov fret0 = f10 - br.ret.sptk rp - ;; -END(___divsf3) - .symver ___divsf3, __divsf3@GLIBC_2.2 - -/* __divdi3 - Compute a 64-bit integer quotient. - in0 holds the dividend. in1 holds the divisor. */ - -ENTRY(___divdi3) - .regstk 2,0,0,0 - /* Transfer inputs to FP registers. */ - setf.sig f8 = in0 - setf.sig f9 = in1 - ;; - /* Convert the inputs to FP, so that they won't be treated as - unsigned. */ - fcvt.xf f8 = f8 - fcvt.xf f9 = f9 - ;; - /* Compute the reciprocal approximation. */ - frcpa.s1 f10, p6 = f8, f9 - ;; - /* 3 Newton-Raphson iterations. */ -(p6) fnma.s1 f11 = f9, f10, f1 -(p6) fmpy.s1 f12 = f8, f10 - ;; -(p6) fmpy.s1 f13 = f11, f11 -(p6) fma.s1 f12 = f11, f12, f12 - ;; -(p6) fma.s1 f10 = f11, f10, f10 -(p6) fma.s1 f11 = f13, f12, f12 - ;; -(p6) fma.s1 f10 = f13, f10, f10 -(p6) fnma.s1 f12 = f9, f11, f8 - ;; -(p6) fma.s1 f10 = f12, f10, f11 - ;; - /* Round quotient to an integer. */ - fcvt.fx.trunc.s1 f10 = f10 - ;; - /* Transfer result to GP registers. */ - getf.sig ret0 = f10 - br.ret.sptk rp - ;; -END(___divdi3) - .symver ___divdi3, __divdi3@GLIBC_2.2 - -/* __moddi3 - Compute a 64-bit integer modulus. - in0 holds the dividend (a). in1 holds the divisor (b). */ - -ENTRY(___moddi3) - .regstk 2,0,0,0 - /* Transfer inputs to FP registers. */ - setf.sig f14 = in0 - setf.sig f9 = in1 - ;; - /* Convert the inputs to FP, so that they won't be treated as - unsigned. */ - fcvt.xf f8 = f14 - fcvt.xf f9 = f9 - ;; - /* Compute the reciprocal approximation. */ - frcpa.s1 f10, p6 = f8, f9 - ;; - /* 3 Newton-Raphson iterations. */ -(p6) fmpy.s1 f12 = f8, f10 -(p6) fnma.s1 f11 = f9, f10, f1 - ;; -(p6) fma.s1 f12 = f11, f12, f12 -(p6) fmpy.s1 f13 = f11, f11 - ;; -(p6) fma.s1 f10 = f11, f10, f10 -(p6) fma.s1 f11 = f13, f12, f12 - ;; - sub in1 = r0, in1 -(p6) fma.s1 f10 = f13, f10, f10 -(p6) fnma.s1 f12 = f9, f11, f8 - ;; - setf.sig f9 = in1 -(p6) fma.s1 f10 = f12, f10, f11 - ;; - fcvt.fx.trunc.s1 f10 = f10 - ;; - /* r = q * (-b) + a */ - xma.l f10 = f10, f9, f14 - ;; - /* Transfer result to GP registers. */ - getf.sig ret0 = f10 - br.ret.sptk rp - ;; -END(___moddi3) - .symver ___moddi3, __moddi3@GLIBC_2.2 - -/* __udivdi3 - Compute a 64-bit unsigned integer quotient. - in0 holds the dividend. in1 holds the divisor. */ - -ENTRY(___udivdi3) - .regstk 2,0,0,0 - /* Transfer inputs to FP registers. */ - setf.sig f8 = in0 - setf.sig f9 = in1 - ;; - /* Convert the inputs to FP, to avoid FP software-assist faults. */ - fcvt.xuf.s1 f8 = f8 - fcvt.xuf.s1 f9 = f9 - ;; - /* Compute the reciprocal approximation. */ - frcpa.s1 f10, p6 = f8, f9 - ;; - /* 3 Newton-Raphson iterations. */ -(p6) fnma.s1 f11 = f9, f10, f1 -(p6) fmpy.s1 f12 = f8, f10 - ;; -(p6) fmpy.s1 f13 = f11, f11 -(p6) fma.s1 f12 = f11, f12, f12 - ;; -(p6) fma.s1 f10 = f11, f10, f10 -(p6) fma.s1 f11 = f13, f12, f12 - ;; -(p6) fma.s1 f10 = f13, f10, f10 -(p6) fnma.s1 f12 = f9, f11, f8 - ;; -(p6) fma.s1 f10 = f12, f10, f11 - ;; - /* Round quotient to an unsigned integer. */ - fcvt.fxu.trunc.s1 f10 = f10 - ;; - /* Transfer result to GP registers. */ - getf.sig ret0 = f10 - br.ret.sptk rp - ;; -END(___udivdi3) - .symver ___udivdi3, __udivdi3@GLIBC_2.2 - -/* __umoddi3 - Compute a 64-bit unsigned integer modulus. - in0 holds the dividend (a). in1 holds the divisor (b). */ - -ENTRY(___umoddi3) - .regstk 2,0,0,0 - /* Transfer inputs to FP registers. */ - setf.sig f14 = in0 - setf.sig f9 = in1 - ;; - /* Convert the inputs to FP, to avoid FP software assist faults. */ - fcvt.xuf.s1 f8 = f14 - fcvt.xuf.s1 f9 = f9 - ;; - /* Compute the reciprocal approximation. */ - frcpa.s1 f10, p6 = f8, f9 - ;; - /* 3 Newton-Raphson iterations. */ -(p6) fmpy.s1 f12 = f8, f10 -(p6) fnma.s1 f11 = f9, f10, f1 - ;; -(p6) fma.s1 f12 = f11, f12, f12 -(p6) fmpy.s1 f13 = f11, f11 - ;; -(p6) fma.s1 f10 = f11, f10, f10 -(p6) fma.s1 f11 = f13, f12, f12 - ;; - sub in1 = r0, in1 -(p6) fma.s1 f10 = f13, f10, f10 -(p6) fnma.s1 f12 = f9, f11, f8 - ;; - setf.sig f9 = in1 -(p6) fma.s1 f10 = f12, f10, f11 - ;; - /* Round quotient to an unsigned integer. */ - fcvt.fxu.trunc.s1 f10 = f10 - ;; - /* r = q * (-b) + a */ - xma.l f10 = f10, f9, f14 - ;; - /* Transfer result to GP registers. */ - getf.sig ret0 = f10 - br.ret.sptk rp - ;; -END(___umoddi3) - .symver ___umoddi3, __umoddi3@GLIBC_2.2 - -/* __multi3 - Compute a 128-bit multiply of 128-bit multiplicands. - in0/in1 holds one multiplicand (a), in2/in3 holds the other one (b). */ - -ENTRY(___multi3) - .regstk 4,0,0,0 - setf.sig f6 = in1 - movl r19 = 0xffffffff - setf.sig f7 = in2 - ;; - and r14 = r19, in0 - ;; - setf.sig f10 = r14 - and r14 = r19, in2 - xmpy.l f9 = f6, f7 - ;; - setf.sig f6 = r14 - shr.u r14 = in0, 32 - ;; - setf.sig f7 = r14 - shr.u r14 = in2, 32 - ;; - setf.sig f8 = r14 - xmpy.l f11 = f10, f6 - xmpy.l f6 = f7, f6 - ;; - getf.sig r16 = f11 - xmpy.l f7 = f7, f8 - ;; - shr.u r14 = r16, 32 - and r16 = r19, r16 - getf.sig r17 = f6 - setf.sig f6 = in0 - ;; - setf.sig f11 = r14 - getf.sig r21 = f7 - setf.sig f7 = in3 - ;; - xma.l f11 = f10, f8, f11 - xma.l f6 = f6, f7, f9 - ;; - getf.sig r18 = f11 - ;; - add r18 = r18, r17 - ;; - and r15 = r19, r18 - cmp.ltu p7, p6 = r18, r17 - ;; - getf.sig r22 = f6 -(p7) adds r14 = 1, r19 - ;; -(p7) add r21 = r21, r14 - shr.u r14 = r18, 32 - shl r15 = r15, 32 - ;; - add r20 = r21, r14 - ;; - add ret0 = r15, r16 - add ret1 = r22, r20 - br.ret.sptk rp - ;; -END(___multi3) - .symver ___multi3, __multi3@GLIBC_2.2 - -#endif diff --git a/sysdeps/ia64/libgcc-compat.c b/sysdeps/ia64/libgcc-compat.c new file mode 100644 index 0000000000..0be489757f --- /dev/null +++ b/sysdeps/ia64/libgcc-compat.c @@ -0,0 +1,84 @@ +/* pre-.hidden libgcc compatibility + Copyright (C) 2002 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + + +#include <stdint.h> +#include <shlib-compat.h> + +#if SHLIB_COMPAT(libc, GLIBC_2_2, GLIBC_2_2_6) + +typedef int int128_t __attribute__((__mode__(TI))); + +extern long double __divtf3 (long double, long double) attribute_hidden; +long double INTUSE (__divtf3) (long double x, long double y) +{ + return __divtf3 (x, y); +} +symbol_version (INTUSE (__divtf3), __divtf3, GLIBC_2.2); + +extern double __divdf3 (double, double) attribute_hidden; +double INTUSE (__divdf3) (double x, double y) +{ + return __divdf3 (x, y); +} +symbol_version (INTUSE (__divdf3), __divdf3, GLIBC_2.2); + +extern float __divsf3 (float, float) attribute_hidden; +float INTUSE (__divsf3) (float x, float y) +{ + return __divsf3 (x, y); +} +symbol_version (INTUSE (__divsf3), __divsf3, GLIBC_2.2); + +extern int64_t __divdi3 (int64_t, int64_t) attribute_hidden; +int64_t INTUSE (__divdi3) (int64_t x, int64_t y) +{ + return __divdi3 (x, y); +} +symbol_version (INTUSE (__divdi3), __divdi3, GLIBC_2.2); + +extern int64_t __moddi3 (int64_t, int64_t) attribute_hidden; +int64_t INTUSE (__moddi3) (int64_t x, int64_t y) +{ + return __moddi3 (x, y); +} +symbol_version (INTUSE (__moddi3), __moddi3, GLIBC_2.2); + +extern uint64_t __udivdi3 (uint64_t, uint64_t) attribute_hidden; +uint64_t INTUSE (__udivdi3) (uint64_t x, uint64_t y) +{ + return __udivdi3 (x, y); +} +symbol_version (INTUSE (__udivdi3), __udivdi3, GLIBC_2.2); + +extern uint64_t __umoddi3 (uint64_t, uint64_t) attribute_hidden; +uint64_t INTUSE (__umoddi3) (uint64_t x, uint64_t y) +{ + return __umoddi3 (x, y); +} +symbol_version (INTUSE (__umoddi3), __umoddi3, GLIBC_2.2); + +extern int128_t __multi3 (int128_t, int128_t) attribute_hidden; +int128_t INTUSE (__multi3) (int128_t x, int128_t y) +{ + return __multi3 (x, y); +} +symbol_version (INTUSE (__multi3), __multi3, GLIBC_2.2); + +#endif diff --git a/sysdeps/unix/alpha/sysdep.h b/sysdeps/unix/alpha/sysdep.h index f60eafea49..5378f81602 100644 --- a/sysdeps/unix/alpha/sysdep.h +++ b/sysdeps/unix/alpha/sysdep.h @@ -167,7 +167,7 @@ __LABEL(name) \ #define INLINE_SYSCALL1(name, nr, args...) \ ({ \ long _sc_ret, _sc_err; \ - inline_syscall##nr(name, args); \ + inline_syscall##nr(__NR_##name, args); \ if (__builtin_expect (_sc_err, 0)) \ { \ __set_errno (_sc_ret); \ @@ -180,6 +180,9 @@ __LABEL(name) \ INTERNAL_SYSCALL1(name, err_out, nr, args) #define INTERNAL_SYSCALL1(name, err_out, nr, args...) \ + INTERNAL_SYSCALL_NCS(__NR_##name, err_out, nr, args) + +#define INTERNAL_SYSCALL_NCS(name, err_out, nr, args...) \ ({ \ long _sc_ret, _sc_err; \ inline_syscall##nr(name, args); \ @@ -223,7 +226,7 @@ __LABEL(name) \ register long _sc_0 inline_syscall_r0_asm; \ register long _sc_19 __asm__("$19"); \ \ - _sc_0 = __NR_##name; \ + _sc_0 = name; \ __asm__ __volatile__ \ ("callsys # %0 %1 <= %2" \ : inline_syscall_r0_out_constraint (_sc_0), \ @@ -240,7 +243,7 @@ __LABEL(name) \ register long _sc_16 __asm__("$16"); \ register long _sc_19 __asm__("$19"); \ \ - _sc_0 = __NR_##name; \ + _sc_0 = name; \ _sc_16 = (long) (arg1); \ __asm__ __volatile__ \ ("callsys # %0 %1 <= %2 %3" \ @@ -259,7 +262,7 @@ __LABEL(name) \ register long _sc_17 __asm__("$17"); \ register long _sc_19 __asm__("$19"); \ \ - _sc_0 = __NR_##name; \ + _sc_0 = name; \ _sc_16 = (long) (arg1); \ _sc_17 = (long) (arg2); \ __asm__ __volatile__ \ @@ -280,7 +283,7 @@ __LABEL(name) \ register long _sc_18 __asm__("$18"); \ register long _sc_19 __asm__("$19"); \ \ - _sc_0 = __NR_##name; \ + _sc_0 = name; \ _sc_16 = (long) (arg1); \ _sc_17 = (long) (arg2); \ _sc_18 = (long) (arg3); \ @@ -303,7 +306,7 @@ __LABEL(name) \ register long _sc_18 __asm__("$18"); \ register long _sc_19 __asm__("$19"); \ \ - _sc_0 = __NR_##name; \ + _sc_0 = name; \ _sc_16 = (long) (arg1); \ _sc_17 = (long) (arg2); \ _sc_18 = (long) (arg3); \ @@ -328,7 +331,7 @@ __LABEL(name) \ register long _sc_19 __asm__("$19"); \ register long _sc_20 __asm__("$20"); \ \ - _sc_0 = __NR_##name; \ + _sc_0 = name; \ _sc_16 = (long) (arg1); \ _sc_17 = (long) (arg2); \ _sc_18 = (long) (arg3); \ @@ -355,7 +358,7 @@ __LABEL(name) \ register long _sc_20 __asm__("$20"); \ register long _sc_21 __asm__("$21"); \ \ - _sc_0 = __NR_##name; \ + _sc_0 = name; \ _sc_16 = (long) (arg1); \ _sc_17 = (long) (arg2); \ _sc_18 = (long) (arg3); \ diff --git a/sysdeps/unix/nice.c b/sysdeps/unix/nice.c index 700305c0e9..1dd57fa5c0 100644 --- a/sysdeps/unix/nice.c +++ b/sysdeps/unix/nice.c @@ -41,7 +41,12 @@ nice (int incr) __set_errno (save); } - result = setpriority (PRIO_PROCESS, 0, prio + incr); + prio += incr; + if (prio < PRIO_MIN) + prio = PRIO_MIN; + else if (prio >= PRIO_MAX) + prio = PRIO_MAX - 1; + result = setpriority (PRIO_PROCESS, 0, prio); if (result != -1) return getpriority (PRIO_PROCESS, 0); else diff --git a/sysdeps/unix/sysv/linux/i386/dl-cache.h b/sysdeps/unix/sysv/linux/i386/dl-cache.h new file mode 100644 index 0000000000..38a1c7dfb4 --- /dev/null +++ b/sysdeps/unix/sysv/linux/i386/dl-cache.h @@ -0,0 +1,59 @@ +/* Support for reading /etc/ld.so.cache files written by Linux ldconfig. + Copyright (C) 2004 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +static inline int +is_ia64 (void) +{ + unsigned int fl1, fl2; + + /* See if we can use cpuid. */ + __asm__ ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;" + "pushl %0; popfl; pushfl; popl %0; popfl" + : "=&r" (fl1), "=&r" (fl2) + : "i" (0x00200000)); + if (((fl1 ^ fl2) & 0x00200000) == 0) + return 0; + + /* Host supports cpuid. See if cpuid gives capabilities, try + CPUID(0). Preserve %ebx and %ecx; cpuid insn clobbers these, we + don't need their CPUID values here, and %ebx may be the PIC + register. */ + __asm__ ("pushl %%ecx; pushl %%ebx; cpuid; popl %%ebx; popl %%ecx" + : "=a" (fl1) : "0" (0) : "edx", "cc"); + if (fl1 == 0) + return 0; + + /* Invoke CPUID(1), return %edx; caller can examine bits to + determine what's supported. */ + __asm__ ("pushl %%ecx; pushl %%ebx; cpuid; popl %%ebx; popl %%ecx" + : "=d" (fl2), "=a" (fl1) : "1" (1) : "cc"); + return (fl2 & (1 << 30)) != 0; +} + +#define arch_startup(argc, argv) \ + do { \ + /* On IA-64, try to execute 64-bit ldconfig if possible. \ + This is because the badly designed /emul/ia32-linux hack \ + will cause 32-bit ldconfig to do all sorts of weird things. */ \ + if (is_ia64 ()) \ + execv ("/emul/ia32-linux/../../sbin/ldconfig", \ + (char *const *) argv); \ + } while (0) + +#include_next <dl-cache.h> diff --git a/sysdeps/unix/sysv/linux/ia64/dl-cache.h b/sysdeps/unix/sysv/linux/ia64/dl-cache.h index b8e2790589..c2165706c0 100644 --- a/sysdeps/unix/sysv/linux/ia64/dl-cache.h +++ b/sysdeps/unix/sysv/linux/ia64/dl-cache.h @@ -22,4 +22,31 @@ #define _dl_cache_check_flags(flags) \ ((flags) == _DL_CACHE_DEFAULT_ID) +#define EMUL_HACK "/emul/ia32-linux" + +#define arch_startup(argc, argv) unlink (EMUL_HACK LD_SO_CACHE) + +#define add_arch_dirs(config_file) \ + do { \ + int save_verbose = opt_verbose; \ + opt_verbose = 0; \ + \ + parse_conf (config_file, EMUL_HACK, true); \ + \ + /* Always add the standard search paths. */ \ + add_system_dir (EMUL_HACK SLIBDIR); \ + if (strcmp (SLIBDIR, LIBDIR)) \ + add_system_dir (EMUL_HACK LIBDIR); \ + \ + char emul_config_file[strlen (config_file) \ + + sizeof EMUL_HACK]; \ + strcpy (mempcpy (emul_config_file, EMUL_HACK, \ + strlen (EMUL_HACK)), config_file); \ + \ + if (! access (emul_config_file, R_OK)) \ + parse_conf (emul_config_file, EMUL_HACK, true); \ + \ + opt_verbose = save_verbose; \ + } while (0) + #include_next <dl-cache.h> diff --git a/sysdeps/unix/sysv/linux/ia64/dl-procinfo.c b/sysdeps/unix/sysv/linux/ia64/dl-procinfo.c new file mode 100644 index 0000000000..7e26fecb3a --- /dev/null +++ b/sysdeps/unix/sysv/linux/ia64/dl-procinfo.c @@ -0,0 +1,5 @@ +#ifdef IS_IN_ldconfig +#include <sysdeps/i386/dl-procinfo.c> +#else +#include <sysdeps/generic/dl-procinfo.c> +#endif diff --git a/sysdeps/unix/sysv/linux/ia64/dl-procinfo.h b/sysdeps/unix/sysv/linux/ia64/dl-procinfo.h new file mode 100644 index 0000000000..b360b4288a --- /dev/null +++ b/sysdeps/unix/sysv/linux/ia64/dl-procinfo.h @@ -0,0 +1,5 @@ +#ifdef IS_IN_ldconfig +#include <sysdeps/unix/sysv/linux/i386/dl-procinfo.h> +#else +#include <sysdeps/generic/dl-procinfo.h> +#endif diff --git a/sysdeps/unix/sysv/linux/ia64/ldd-rewrite.sed b/sysdeps/unix/sysv/linux/ia64/ldd-rewrite.sed index 535d1671e3..1df27afd2d 100644 --- a/sysdeps/unix/sysv/linux/ia64/ldd-rewrite.sed +++ b/sysdeps/unix/sysv/linux/ia64/ldd-rewrite.sed @@ -1 +1 @@ -s_^\(RTLDLIST=\)\([^ ]*\)-ia64\(\.so\.[0-9.]*\)[ ]*$_\1"\2-ia64\3 \2\3"_ +s_^\(RTLDLIST=\)\([^ ]*\)-ia64\(\.so\.[0-9.]*\)[ ]*$_\1"\2-ia64\3 /emul/ia32-linux\2\3"_ diff --git a/sysdeps/unix/sysv/linux/paths.h b/sysdeps/unix/sysv/linux/paths.h index fb2c77e99b..a87831e74a 100644 --- a/sysdeps/unix/sysv/linux/paths.h +++ b/sysdeps/unix/sysv/linux/paths.h @@ -61,7 +61,7 @@ #define _PATH_TTY "/dev/tty" #define _PATH_UNIX "/boot/vmlinux" #define _PATH_UTMP "/var/run/utmp" -#define _PATH_VI "/usr/bin/vi" +#define _PATH_VI "/bin/vi" #define _PATH_WTMP "/var/log/wtmp" /* Provide trailing slash, since mostly used for building pathnames. */ diff --git a/sysdeps/unix/sysv/linux/s390/s390-32/sysdep.h b/sysdeps/unix/sysv/linux/s390/s390-32/sysdep.h index d759e4a664..55a2cd7443 100644 --- a/sysdeps/unix/sysv/linux/s390/s390-32/sysdep.h +++ b/sysdeps/unix/sysv/linux/s390/s390-32/sysdep.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2000,01,02,03 Free Software Foundation, Inc. +/* Copyright (C) 2000,01,02,03,04 Free Software Foundation, Inc. Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). This file is part of the GNU C Library. @@ -207,7 +207,20 @@ asm volatile ( \ "svc 0\n\t" \ : "=d" (_ret) \ - : "d" (_nr), "i" (__NR_##name) ASMFMT_##nr \ + : "d" (_nr) ASMFMT_##nr \ + : "memory" ); \ + _ret; }) + +#undef INTERNAL_SYSCALL_NCS +#define INTERNAL_SYSCALL_NCS(no, err, nr, args...) \ + ({ \ + DECLARGS_##nr(args) \ + register unsigned long _nr asm("1") = (unsigned long)(no); \ + register int _ret asm("2"); \ + asm volatile ( \ + "svc 0\n\t" \ + : "=d" (_ret) \ + : "d" (_nr) ASMFMT_##nr \ : "memory" ); \ _ret; }) diff --git a/sysdeps/unix/sysv/linux/s390/s390-64/sysdep.h b/sysdeps/unix/sysv/linux/s390/s390-64/sysdep.h index f0d7cbe2d9..c7f3a03f26 100644 --- a/sysdeps/unix/sysv/linux/s390/s390-64/sysdep.h +++ b/sysdeps/unix/sysv/linux/s390/s390-64/sysdep.h @@ -1,5 +1,5 @@ /* Assembler macros for 64 bit S/390. - Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright (C) 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). This file is part of the GNU C Library. @@ -209,7 +209,20 @@ asm volatile ( \ "svc 0\n\t" \ : "=d" (_ret) \ - : "d" (_nr), "i" (__NR_##name) ASMFMT_##nr \ + : "d" (_nr) ASMFMT_##nr \ + : "memory" ); \ + _ret; }) + +#undef INTERNAL_SYSCALL_NCS +#define INTERNAL_SYSCALL_NCS(no, err, nr, args...) \ + ({ \ + DECLARGS_##nr(args) \ + register unsigned long _nr asm("1") = (unsigned long)(no); \ + register long _ret asm("2"); \ + asm volatile ( \ + "svc 0\n\t" \ + : "=d" (_ret) \ + : "d" (_nr) ASMFMT_##nr \ : "memory" ); \ _ret; }) diff --git a/sysdeps/unix/sysv/linux/sparc/sparc32/setresgid.c b/sysdeps/unix/sysv/linux/sparc/sparc32/setresgid.c deleted file mode 100644 index daca1a4833..0000000000 --- a/sysdeps/unix/sysv/linux/sparc/sparc32/setresgid.c +++ /dev/null @@ -1 +0,0 @@ -#include <sysdeps/unix/sysv/linux/i386/setresgid.c> diff --git a/sysdeps/unix/sysv/linux/sparc/sparc32/setresuid.c b/sysdeps/unix/sysv/linux/sparc/sparc32/setresuid.c deleted file mode 100644 index 3aeabe9ad7..0000000000 --- a/sysdeps/unix/sysv/linux/sparc/sparc32/setresuid.c +++ /dev/null @@ -1 +0,0 @@ -#include <sysdeps/unix/sysv/linux/i386/setresuid.c> diff --git a/sysdeps/unix/sysv/linux/sparc/sysdep.h b/sysdeps/unix/sysv/linux/sparc/sysdep.h index 707109b01b..a60937976a 100644 --- a/sysdeps/unix/sysv/linux/sparc/sysdep.h +++ b/sysdeps/unix/sysv/linux/sparc/sysdep.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2000, 2002, 2003 Free Software Foundation, Inc. +/* Copyright (C) 2000, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Jakub Jelinek <jakub@redhat.com>, 2000. @@ -22,13 +22,17 @@ #undef INLINE_SYSCALL #define INLINE_SYSCALL(name, nr, args...) \ - inline_syscall##nr(__SYSCALL_STRING, name, args) + inline_syscall##nr(__SYSCALL_STRING, __NR_##name, args) #undef INTERNAL_SYSCALL_DECL #define INTERNAL_SYSCALL_DECL(err) do { } while (0) #undef INTERNAL_SYSCALL #define INTERNAL_SYSCALL(name, err, nr, args...) \ + inline_syscall##nr(__INTERNAL_SYSCALL_STRING, __NR_##name, args) + +#undef INTERNAL_SYSCALL_NCS +#define INTERNAL_SYSCALL_NCS(name, err, nr, args...) \ inline_syscall##nr(__INTERNAL_SYSCALL_STRING, name, args) #undef INTERNAL_SYSCALL_ERROR_P @@ -41,7 +45,7 @@ #define inline_syscall0(string,name,dummy...) \ ({ \ register long __o0 __asm__ ("o0"); \ - register long __g1 __asm__ ("g1") = __NR_##name; \ + register long __g1 __asm__ ("g1") = name; \ __asm __volatile (string : "=r" (__g1), "=r" (__o0) : \ "0" (__g1) : \ __SYSCALL_CLOBBERS); \ @@ -51,7 +55,7 @@ #define inline_syscall1(string,name,arg1) \ ({ \ register long __o0 __asm__ ("o0") = (long)(arg1); \ - register long __g1 __asm__ ("g1") = __NR_##name; \ + register long __g1 __asm__ ("g1") = name; \ __asm __volatile (string : "=r" (__g1), "=r" (__o0) : \ "0" (__g1), "1" (__o0) : \ __SYSCALL_CLOBBERS); \ @@ -62,7 +66,7 @@ ({ \ register long __o0 __asm__ ("o0") = (long)(arg1); \ register long __o1 __asm__ ("o1") = (long)(arg2); \ - register long __g1 __asm__ ("g1") = __NR_##name; \ + register long __g1 __asm__ ("g1") = name; \ __asm __volatile (string : "=r" (__g1), "=r" (__o0) : \ "0" (__g1), "1" (__o0), "r" (__o1) : \ __SYSCALL_CLOBBERS); \ @@ -74,7 +78,7 @@ register long __o0 __asm__ ("o0") = (long)(arg1); \ register long __o1 __asm__ ("o1") = (long)(arg2); \ register long __o2 __asm__ ("o2") = (long)(arg3); \ - register long __g1 __asm__ ("g1") = __NR_##name; \ + register long __g1 __asm__ ("g1") = name; \ __asm __volatile (string : "=r" (__g1), "=r" (__o0) : \ "0" (__g1), "1" (__o0), "r" (__o1), \ "r" (__o2) : \ @@ -88,7 +92,7 @@ register long __o1 __asm__ ("o1") = (long)(arg2); \ register long __o2 __asm__ ("o2") = (long)(arg3); \ register long __o3 __asm__ ("o3") = (long)(arg4); \ - register long __g1 __asm__ ("g1") = __NR_##name; \ + register long __g1 __asm__ ("g1") = name; \ __asm __volatile (string : "=r" (__g1), "=r" (__o0) : \ "0" (__g1), "1" (__o0), "r" (__o1), \ "r" (__o2), "r" (__o3) : \ @@ -103,7 +107,7 @@ register long __o2 __asm__ ("o2") = (long)(arg3); \ register long __o3 __asm__ ("o3") = (long)(arg4); \ register long __o4 __asm__ ("o4") = (long)(arg5); \ - register long __g1 __asm__ ("g1") = __NR_##name; \ + register long __g1 __asm__ ("g1") = name; \ __asm __volatile (string : "=r" (__g1), "=r" (__o0) : \ "0" (__g1), "1" (__o0), "r" (__o1), \ "r" (__o2), "r" (__o3), "r" (__o4) : \ @@ -119,7 +123,7 @@ register long __o3 __asm__ ("o3") = (long)(arg4); \ register long __o4 __asm__ ("o4") = (long)(arg5); \ register long __o5 __asm__ ("o5") = (long)(arg6); \ - register long __g1 __asm__ ("g1") = __NR_##name; \ + register long __g1 __asm__ ("g1") = name; \ __asm __volatile (string : "=r" (__g1), "=r" (__o0) : \ "0" (__g1), "1" (__o0), "r" (__o1), \ "r" (__o2), "r" (__o3), "r" (__o4), \ diff --git a/sysdeps/unix/sysv/linux/tcsetattr.c b/sysdeps/unix/sysv/linux/tcsetattr.c index f73ec8883e..21e6ab2ede 100644 --- a/sysdeps/unix/sysv/linux/tcsetattr.c +++ b/sysdeps/unix/sysv/linux/tcsetattr.c @@ -49,6 +49,7 @@ tcsetattr (fd, optional_actions, termios_p) { struct __kernel_termios k_termios; unsigned long int cmd; + int retval; switch (optional_actions) { @@ -80,6 +81,35 @@ tcsetattr (fd, optional_actions, termios_p) memcpy (&k_termios.c_cc[0], &termios_p->c_cc[0], __KERNEL_NCCS * sizeof (cc_t)); - return INLINE_SYSCALL (ioctl, 3, fd, cmd, &k_termios); + retval = INLINE_SYSCALL (ioctl, 3, fd, cmd, &k_termios); + + if (retval == 0 && cmd == TCSETS) + { + /* The Linux kernel has a bug which silently ignore the invalid + c_cflag on pty. We have to check it here. */ + int save = errno; + retval = INLINE_SYSCALL (ioctl, 3, fd, TCGETS, &k_termios); + if (retval) + { + /* We cannot verify if the setting is ok. We don't return + an error (?). */ + __set_errno (save); + retval = 0; + } + else if ((termios_p->c_cflag & (PARENB | CREAD)) + != (k_termios.c_cflag & (PARENB | CREAD)) + || ((termios_p->c_cflag & CSIZE) + && ((termios_p->c_cflag & CSIZE) + != (k_termios.c_cflag & CSIZE)))) + { + /* It looks like the Linux kernel silently changed the + PARENB/CREAD/CSIZE bits in c_cflag. Report it as an + error. */ + __set_errno (EINVAL); + retval = -1; + } + } + + return retval; } libc_hidden_def (tcsetattr) |