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Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 776b7cab98..1e11464acc 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2016-05-27 H.J. Lu <hongjiu.lu@intel.com> + + * sysdeps/x86/cacheinfo.c (init_cacheinfo): Count number of + available logical processors with SMT level type sharing L2 + cache for Intel processors. + 2016-05-27 Joseph Myers <joseph@codesourcery.com> [BZ #20160] |