diff options
| -rw-r--r-- | sysdeps/x86/cacheinfo.c | 11 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.h | 13 |
2 files changed, 23 insertions, 1 deletions
diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 12ffeef5b5..321fbb6310 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -745,6 +745,9 @@ intel_bug_no_cache_info: #endif } + if (cpu_features->cache.data_size != 0) + data = cpu_features->cache.data_size; + if (data > 0) { __x86_raw_data_cache_size_half = data / 2; @@ -755,6 +758,9 @@ intel_bug_no_cache_info: __x86_data_cache_size = data; } + if (cpu_features->cache.shared_size != 0) + shared = cpu_features->cache.shared_size; + if (shared > 0) { __x86_raw_shared_cache_size_half = shared / 2; @@ -768,7 +774,10 @@ intel_bug_no_cache_info: /* The large memcpy micro benchmark in glibc shows that 6 times of shared cache size is the approximate value above which non-temporal store becomes faster. */ - __x86_shared_non_temporal_threshold = __x86_shared_cache_size * 6; + __x86_shared_non_temporal_threshold + = (cpu_features->cache.non_temporal_threshold != 0 + ? cpu_features->cache.non_temporal_threshold + : __x86_shared_cache_size * 6); } #endif diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index 31c7c8023e..f428dca67b 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -185,6 +185,18 @@ #else /* __ASSEMBLER__ */ +struct cache_info +{ + /* Data cache size for use in memory and string routines, typically + L1 size. */ + long int data_size; + /* Shared cache size for use in memory and string routines, typically + L2 or L3 size. */ + long int shared_size; + /* Threshold to use non temporal store. */ + long int non_temporal_threshold; +}; + enum { COMMON_CPUID_INDEX_1 = 0, @@ -214,6 +226,7 @@ struct cpu_features unsigned int family; unsigned int model; unsigned int feature[FEATURE_INDEX_MAX]; + struct cache_info cache; }; /* Used from outside of glibc to get access to the CPU features |