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| author | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-24 09:42:12 -0700 |
|---|---|---|
| committer | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-27 08:35:51 -0700 |
| commit | 227afaa67213efcdce6a870ef5086200f1076438 (patch) | |
| tree | ebf7ab75d079ece8cced5978bea3da23d775f5ee /wcsmbs/tst-c16-surrogate.c | |
| parent | dbb0f06cc09784f6229cc1736c4af8caa687975f (diff) | |
| download | glibc-227afaa67213efcdce6a870ef5086200f1076438.tar.gz glibc-227afaa67213efcdce6a870ef5086200f1076438.tar.xz glibc-227afaa67213efcdce6a870ef5086200f1076438.zip | |
x86: Align entry for memrchr to 64-bytes.
The function was tuned around 64-byte entry alignment and performs better for all sizes with it. As well different code boths where explicitly written to touch the minimum number of cache line i.e sizes <= 32 touch only the entry cache line.
Diffstat (limited to 'wcsmbs/tst-c16-surrogate.c')
0 files changed, 0 insertions, 0 deletions