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authorUlrich Drepper <drepper@gmail.com>2011-07-20 21:21:03 -0400
committerUlrich Drepper <drepper@gmail.com>2011-07-20 21:21:03 -0400
commit5644ef5461b5d3ff266206d8ee70d4b575ea6658 (patch)
tree193bd218ab8cf9681ee55ff3526a58c4ae0847d1 /sysdeps
parent6986b98a18490e76b16911d1c6b1ba013598d40d (diff)
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Fix check for AVX enablement
The AVX bit is set if the CPU supports AVX.  But this doesn't mean the
kernel does.  Add checks according to Intel's documentation.
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/x86_64/dl-trampoline.S17
1 files changed, 12 insertions, 5 deletions
diff --git a/sysdeps/x86_64/dl-trampoline.S b/sysdeps/x86_64/dl-trampoline.S
index 5564a11af2..1b97929aaa 100644
--- a/sysdeps/x86_64/dl-trampoline.S
+++ b/sysdeps/x86_64/dl-trampoline.S
@@ -1,5 +1,5 @@
 /* PLT trampolines.  x86-64 version.
-   Copyright (C) 2004, 2005, 2007, 2009 Free Software Foundation, Inc.
+   Copyright (C) 2004, 2005, 2007, 2009, 2011 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -139,10 +139,17 @@ L(have_avx):
 	movl	$1, %eax
 	cpuid
 	movq	%r11,%rbx		# Restore rbx
-	movl	$1, %eax
-	testl	$(1 << 28), %ecx
-	jne	2f
-	negl	%eax
+	xorl	%eax, %eax
+	// AVX and XSAVE supported?
+	testl	$((1 << 28) | (1 << 27)), %ecx
+	je	2f
+	xorl	%ecx, %ecx
+	// Get XFEATURE_ENABLED_MASK
+	xgetbv
+	andl	$0x6, %eax
+	cmpl	$0x6, %eax
+	// Nonzero if SSE and AVX state saving is enabled.
+	sete	%al
 2:	movl	%eax, L(have_avx)(%rip)
 	cmpl	$0, %eax