about summary refs log tree commit diff
path: root/sysdeps/x86_64
diff options
context:
space:
mode:
authorUlrich Drepper <drepper@redhat.com>2009-02-01 18:13:41 +0000
committerUlrich Drepper <drepper@redhat.com>2009-02-01 18:13:41 +0000
commitebc22416e4ab003dbe67c53590cfeaefd2b37da6 (patch)
treea588cee9adf3ecb3b90187f019f7fafe8fbc76a5 /sysdeps/x86_64
parent00f5df0e73cf13a0da2d06e8da38d5d085b70e22 (diff)
downloadglibc-ebc22416e4ab003dbe67c53590cfeaefd2b37da6.tar.gz
glibc-ebc22416e4ab003dbe67c53590cfeaefd2b37da6.tar.xz
glibc-ebc22416e4ab003dbe67c53590cfeaefd2b37da6.zip
* sysdeps/x86_64/cacheinfo.c (intel_02_known): Add new descriptors.
	* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Likewise.
Diffstat (limited to 'sysdeps/x86_64')
-rw-r--r--sysdeps/x86_64/cacheinfo.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c
index 6a3ea0f1cb..a7e3fc7633 100644
--- a/sysdeps/x86_64/cacheinfo.c
+++ b/sysdeps/x86_64/cacheinfo.c
@@ -34,8 +34,10 @@ static const struct intel_02_cache_info
   {
     { 0x06, _SC_LEVEL1_ICACHE_SIZE,    8192,  4, 32 },
     { 0x08, _SC_LEVEL1_ICACHE_SIZE,   16384,  4, 32 },
+    { 0x09, _SC_LEVEL1_ICACHE_SIZE,   32768,  4, 32 },
     { 0x0a, _SC_LEVEL1_DCACHE_SIZE,    8192,  2, 32 },
     { 0x0c, _SC_LEVEL1_DCACHE_SIZE,   16384,  4, 32 },
+    { 0x0d, _SC_LEVEL1_DCACHE_SIZE,   16384,  4, 64 },
     { 0x22, _SC_LEVEL3_CACHE_SIZE,   524288,  4, 64 },
     { 0x23, _SC_LEVEL3_CACHE_SIZE,  1048576,  8, 64 },
     { 0x25, _SC_LEVEL3_CACHE_SIZE,  2097152,  8, 64 },
@@ -80,6 +82,18 @@ static const struct intel_02_cache_info
     { 0x85, _SC_LEVEL2_CACHE_SIZE,  2097152,  8, 32 },
     { 0x86, _SC_LEVEL2_CACHE_SIZE,   524288,  4, 64 },
     { 0x87, _SC_LEVEL2_CACHE_SIZE,  1048576,  8, 64 },
+    { 0xd0, _SC_LEVEL3_CACHE_SIZE,   524288,  4, 64 },
+    { 0xd1, _SC_LEVEL3_CACHE_SIZE,  1048576,  4, 64 },
+    { 0xd2, _SC_LEVEL3_CACHE_SIZE,  2097152,  4, 64 },
+    { 0xd6, _SC_LEVEL3_CACHE_SIZE,  1048576,  8, 64 },
+    { 0xd7, _SC_LEVEL3_CACHE_SIZE,  2097152,  8, 64 },
+    { 0xd8, _SC_LEVEL3_CACHE_SIZE,  4194304,  8, 64 },
+    { 0xdc, _SC_LEVEL3_CACHE_SIZE,  2097152, 12, 64 },
+    { 0xdd, _SC_LEVEL3_CACHE_SIZE,  4194304, 12, 64 },
+    { 0xde, _SC_LEVEL3_CACHE_SIZE,  8388608, 12, 64 },
+    { 0xe3, _SC_LEVEL3_CACHE_SIZE,  2097152, 16, 64 },
+    { 0xe3, _SC_LEVEL3_CACHE_SIZE,  4194304, 16, 64 },
+    { 0xe4, _SC_LEVEL3_CACHE_SIZE,  8388608, 16, 64 },
   };
 
 #define nintel_02_known (sizeof (intel_02_known) / sizeof (intel_02_known [0]))