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| author | Liubov Dmitrieva <liubov.dmitrieva@intel.com> | 2013-06-28 15:28:50 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2013-06-28 15:31:40 -0700 |
| commit | 6308fd9a46a2f4aa550886e6f58190fb209ef027 (patch) | |
| tree | 668039e1091165b38354a1ffebf35b0058de3eed /sysdeps/x86_64/multiarch/init-arch.h | |
| parent | 89cd956937f46e8f4a0374994965f991642dd408 (diff) | |
| download | glibc-6308fd9a46a2f4aa550886e6f58190fb209ef027.tar.gz glibc-6308fd9a46a2f4aa550886e6f58190fb209ef027.tar.xz glibc-6308fd9a46a2f4aa550886e6f58190fb209ef027.zip | |
Skip SSE4.2 versions on Intel Silvermont
SSE2/SSSE3 versions are faster than SSE4.2 versions on Intel Silvermont.
Diffstat (limited to 'sysdeps/x86_64/multiarch/init-arch.h')
| -rw-r--r-- | sysdeps/x86_64/multiarch/init-arch.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/x86_64/multiarch/init-arch.h b/sysdeps/x86_64/multiarch/init-arch.h index 28edbf7d07..0cb5f5bc30 100644 --- a/sysdeps/x86_64/multiarch/init-arch.h +++ b/sysdeps/x86_64/multiarch/init-arch.h @@ -23,6 +23,7 @@ #define bit_AVX_Usable (1 << 6) #define bit_FMA_Usable (1 << 7) #define bit_FMA4_Usable (1 << 8) +#define bit_Slow_SSE4_2 (1 << 9) /* CPUID Feature flags. */ @@ -62,6 +63,7 @@ # define index_AVX_Usable FEATURE_INDEX_1*FEATURE_SIZE # define index_FMA_Usable FEATURE_INDEX_1*FEATURE_SIZE # define index_FMA4_Usable FEATURE_INDEX_1*FEATURE_SIZE +# define index_Slow_SSE4_2 FEATURE_INDEX_1*FEATURE_SIZE #else /* __ASSEMBLER__ */ @@ -156,9 +158,11 @@ extern const struct cpu_features *__get_cpu_features (void) # define index_Fast_Copy_Backward FEATURE_INDEX_1 # define index_Slow_BSF FEATURE_INDEX_1 # define index_Fast_Unaligned_Load FEATURE_INDEX_1 +# define index_Prefer_PMINUB_for_stringop FEATURE_INDEX_1 # define index_AVX_Usable FEATURE_INDEX_1 # define index_FMA_Usable FEATURE_INDEX_1 # define index_FMA4_Usable FEATURE_INDEX_1 +# define index_Slow_SSE4_2 FEATURE_INDEX_1 # define HAS_ARCH_FEATURE(name) \ ((__get_cpu_features ()->feature[index_##name] & (bit_##name)) != 0) |