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author | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-22 16:51:20 -0700 |
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committer | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-22 19:41:35 -0700 |
commit | 3edda6a0f013736ca9554a95e553739a41dbd4b7 (patch) | |
tree | ccd51457ca5c4c7a01f8b266bcf1372e498bb0dc /sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c | |
parent | 703f4341083afa7d71987aa96a35eab81309e634 (diff) | |
download | glibc-3edda6a0f013736ca9554a95e553739a41dbd4b7.tar.gz glibc-3edda6a0f013736ca9554a95e553739a41dbd4b7.tar.xz glibc-3edda6a0f013736ca9554a95e553739a41dbd4b7.zip |
x86: Add support for compiling {raw|w}memchr with high ISA level
1. Refactor files so that all implementations for in the multiarch directory. - Essentially moved sse2 {raw|w}memchr.S implementation to multiarch/{raw|w}memchr-sse2.S - The non-multiarch {raw|w}memchr.S file now only includes one of the implementations in the multiarch directory based on the compiled ISA level (only used for non-multiarch builds. Otherwise we go through the ifunc selector). 2. Add ISA level build guards to different implementations. - I.e memchr-avx2.S which is ISA level 3 will only build if compiled ISA level <= 3. Otherwise there is no reason to include it as we will always use one of the ISA level 4 implementations (memchr-evex{-rtm}.S). 3. Add new multiarch/rtld-{raw}memchr.S that just include the non-multiarch {raw}memchr.S which will in turn select the best implementation based on the compiled ISA level. 4. Refactor the ifunc selector and ifunc implementation list to use the ISA level aware wrapper macros that allow functions below the compiled ISA level (with a guranteed replacement) to be skipped. - Guranteed replacement essentially means that for any ISA level build there must be a function that the baseline of the ISA supports. So for {raw|w}memchr.S since there is not ISA level 2 function, the ISA level 2 build still includes the ISA level 1 (sse2) function. Once we reach the ISA level 3 build, however, {raw|w}memchr-avx2{-rtm}.S will always be sufficient so the ISA level 1 implementation ({raw|w}memchr-sse2.S) will not be built. Tested with and without multiarch on x86_64 for ISA levels: {generic, x86-64-v2, x86-64-v3, x86-64-v4} And m32 with and without multiarch.
Diffstat (limited to 'sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c')
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