about summary refs log tree commit diff
path: root/sysdeps/x86_64/fpu/multiarch/svml_d_tan8_core_avx512.S
diff options
context:
space:
mode:
authorSunil K Pandey <skpgkp2@gmail.com>2022-03-07 10:47:15 -0800
committerSunil K Pandey <skpgkp2@gmail.com>2022-03-07 21:44:09 -0800
commit7425f0c1e55803587cd0f82f8e604799cb3443bf (patch)
tree4ee74af8e71004506cf4ee4034d56f985964eefa /sysdeps/x86_64/fpu/multiarch/svml_d_tan8_core_avx512.S
parent7f852d2592b50ef9c6daed656b8f33c65bfe594a (diff)
downloadglibc-7425f0c1e55803587cd0f82f8e604799cb3443bf.tar.gz
glibc-7425f0c1e55803587cd0f82f8e604799cb3443bf.tar.xz
glibc-7425f0c1e55803587cd0f82f8e604799cb3443bf.zip
x86_64: Fix svml_d_tan4_core_avx2.S code formatting
This commit contains following formatting changes

1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
   between it and the first operand.
3. Instruction greater than 7 characters in length have a
   space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
8. 1 space between line content and line comment.
9. Space after all commas.

Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
Diffstat (limited to 'sysdeps/x86_64/fpu/multiarch/svml_d_tan8_core_avx512.S')
0 files changed, 0 insertions, 0 deletions