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| author | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-09 11:16:35 -0700 |
|---|---|---|
| committer | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-09 12:51:04 -0700 |
| commit | 65897e991685c87f4575694197d3ce24f7fc9c5a (patch) | |
| tree | 69ff6478a0982003b267bd380813743a56645985 /sysdeps/x86_64/fpu/multiarch/s_sin.c | |
| parent | 73bae395cfc862a30e640e9de6f2defecd6fd100 (diff) | |
| download | glibc-65897e991685c87f4575694197d3ce24f7fc9c5a.tar.gz glibc-65897e991685c87f4575694197d3ce24f7fc9c5a.tar.xz glibc-65897e991685c87f4575694197d3ce24f7fc9c5a.zip | |
x86: Improve svml_s_atanhf8_core_avx2.S
Improvements are:
1. Reduce code size (-60 bytes).
2. Remove redundant move instructions.
3. Slightly improve instruction selection/scheduling where
possible.
4. Prefer registers which get short instruction encoding.
5. Shrink rodata usage (-32 bytes).
The throughput improvement is not that significant (3-5%) as the
port 0 bottleneck is unavoidable.
Function, New Time, Old Time, New / Old
_ZGVdN8v_atanhf, 2.799, 2.923, 0.958
Diffstat (limited to 'sysdeps/x86_64/fpu/multiarch/s_sin.c')
0 files changed, 0 insertions, 0 deletions