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author | Sunil K Pandey <skpgkp2@gmail.com> | 2022-03-07 10:47:09 -0800 |
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committer | Sunil K Pandey <skpgkp2@gmail.com> | 2022-03-07 21:14:09 -0800 |
commit | f2857115061eb25e0e0ca708f0ca740fbaa8972e (patch) | |
tree | 47a504e2e0b3acf3996442fdd5a8b301cc80cb90 /sysdeps/x86_64/fpu/fegetexcept.c | |
parent | b61bfd101e23489feac53c0dbe8ba3a5e5a44aa0 (diff) | |
download | glibc-f2857115061eb25e0e0ca708f0ca740fbaa8972e.tar.gz glibc-f2857115061eb25e0e0ca708f0ca740fbaa8972e.tar.xz glibc-f2857115061eb25e0e0ca708f0ca740fbaa8972e.zip |
x86_64: Fix svml_d_asinh8_core_avx512.S code formatting
This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
Diffstat (limited to 'sysdeps/x86_64/fpu/fegetexcept.c')
0 files changed, 0 insertions, 0 deletions