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author | Anton Youdkevitch <anton.youdkevitch@bell-sw.com> | 2019-05-03 11:01:34 -0700 |
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committer | Steve Ellcey <sellcey@caviumnetworks.com> | 2019-05-03 11:01:34 -0700 |
commit | 32e902a94e24fc5a00168d0df3301098704c61fb (patch) | |
tree | 88bd3588b0e08141855220a21467f230366b42db /sysdeps/x86 | |
parent | ac3da35de5cf113edfd514c2fc8ccbaed4536aaf (diff) | |
download | glibc-32e902a94e24fc5a00168d0df3301098704c61fb.tar.gz glibc-32e902a94e24fc5a00168d0df3301098704c61fb.tar.xz glibc-32e902a94e24fc5a00168d0df3301098704c61fb.zip |
aarch64: thunderx2 memmove performance improvements
The performance improvement is about 20%-30% for larger cases and about 1%-5% for smaller cases. Used SIMD load/store instead of GPR for large overlapping forward moves. Reused existing memcpy implementation for smaller or overlapping backward moves. Fixed the existing memcpy implementation to allow it to deal with the overlapping case. Simplified loop tails in the memcpy implementation - use branchless overlapping sequence of fixed length load/stores instead of branching depending on the size. A cleanup/optimization converting str's to stp's. Added __memmove_thunderx2 to the list of the available implementations.
Diffstat (limited to 'sysdeps/x86')
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