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author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2020-03-26 11:00:56 -0300 |
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committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2020-04-17 11:42:29 -0300 |
commit | 460ee50de054396cc9791ff4cfdc2f5029fb923d (patch) | |
tree | 476f6485317bd2901682f920fa04e93541680e0f /sysdeps/x86/tst-cet-legacy-mod-6a.c | |
parent | c10dde0d2a6373f6e7688e93a5c9db58162ddb1f (diff) | |
download | glibc-460ee50de054396cc9791ff4cfdc2f5029fb923d.tar.gz glibc-460ee50de054396cc9791ff4cfdc2f5029fb923d.tar.xz glibc-460ee50de054396cc9791ff4cfdc2f5029fb923d.zip |
x86_64: Add SSE sfp-exceptions
The exported x86_64 fenv.h functions operate on both i387 and SSE (since they should work on both float, double, and long double) while the internal libc_fe* set either SSE (float, double, and float128) or i387 (long double). The libgcc __sfp_handle_exceptions (used on float128 implementation), however, will set either SEE or i387 exception depending of the exception to raise. This broke the internal assumption of float128 where only SSE operations will be used. This patch reimplements the libgcc __sfp_handle_exceptions to use only SSE operations and sets libgcc to use it instead of its own implementation. And I think we should fix libgcc in a similar manner, since checking on config/i386/64/sfp-machine.h it already only supports SSE rounding mode and x86_64 ABI also expectes float128 to use SSE registers [1] (although it is not clear on how future implementation might implement it). Checked on x86_64-linux-gnu. [1] https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI
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