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author | H.J. Lu <hjl.tools@gmail.com> | 2018-10-02 07:51:48 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2018-10-02 07:51:57 -0700 |
commit | a1ccc0654b4e858022bed10f4fb5d5ab6df58b62 (patch) | |
tree | 37f5fec387b51763513493cd5149b71589f77dab /sysdeps/unix/sysv/linux | |
parent | 0b727ed4d605d9318cb0d323c88abb0d5a441a9b (diff) | |
download | glibc-a1ccc0654b4e858022bed10f4fb5d5ab6df58b62.tar.gz glibc-a1ccc0654b4e858022bed10f4fb5d5ab6df58b62.tar.xz glibc-a1ccc0654b4e858022bed10f4fb5d5ab6df58b62.zip |
x86: Use RTM intrinsics in pthread mutex lock elision
Since RTM intrinsics are supported in GCC 4.9, we can use them in pthread mutex lock elision. * sysdeps/unix/sysv/linux/x86/Makefile (CFLAGS-elision-lock.c): Add -mrtm. (CFLAGS-elision-unlock.c): Likewise. (CFLAGS-elision-timed.c): Likewise. (CFLAGS-elision-trylock.c): Likewise. * sysdeps/unix/sysv/linux/x86/hle.h: Rewritten.
Diffstat (limited to 'sysdeps/unix/sysv/linux')
-rw-r--r-- | sysdeps/unix/sysv/linux/x86/Makefile | 4 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/x86/hle.h | 70 |
2 files changed, 7 insertions, 67 deletions
diff --git a/sysdeps/unix/sysv/linux/x86/Makefile b/sysdeps/unix/sysv/linux/x86/Makefile index 7dc4e61756..02ca36c6d2 100644 --- a/sysdeps/unix/sysv/linux/x86/Makefile +++ b/sysdeps/unix/sysv/linux/x86/Makefile @@ -14,6 +14,10 @@ endif ifeq ($(subdir),nptl) libpthread-sysdep_routines += elision-lock elision-unlock elision-timed \ elision-trylock +CFLAGS-elision-lock.c += -mrtm +CFLAGS-elision-unlock.c += -mrtm +CFLAGS-elision-timed.c += -mrtm +CFLAGS-elision-trylock.c += -mrtm endif ifeq ($(subdir),elf) diff --git a/sysdeps/unix/sysv/linux/x86/hle.h b/sysdeps/unix/sysv/linux/x86/hle.h index 4a7b9e3bf7..0449026839 100644 --- a/sysdeps/unix/sysv/linux/x86/hle.h +++ b/sysdeps/unix/sysv/linux/x86/hle.h @@ -1,75 +1,11 @@ -/* Shared RTM header. Emulate TSX intrinsics for compilers and assemblers - that do not support the intrinsics and instructions yet. */ +/* Shared RTM header. */ #ifndef _HLE_H #define _HLE_H 1 -#ifdef __ASSEMBLER__ +#include <x86intrin.h> -.macro XBEGIN target - .byte 0xc7,0xf8 - .long \target-1f -1: -.endm - -.macro XEND - .byte 0x0f,0x01,0xd5 -.endm - -.macro XABORT code - .byte 0xc6,0xf8,\code -.endm - -.macro XTEST - .byte 0x0f,0x01,0xd6 -.endm - -#endif - -/* Official RTM intrinsics interface matching gcc/icc, but works - on older gcc compatible compilers and binutils. - We should somehow detect if the compiler supports it, because - it may be able to generate slightly better code. */ - -#define _XBEGIN_STARTED (~0u) -#define _XABORT_EXPLICIT (1 << 0) -#define _XABORT_RETRY (1 << 1) -#define _XABORT_CONFLICT (1 << 2) -#define _XABORT_CAPACITY (1 << 3) -#define _XABORT_DEBUG (1 << 4) -#define _XABORT_NESTED (1 << 5) -#define _XABORT_CODE(x) (((x) >> 24) & 0xff) - -#define _ABORT_LOCK_BUSY 0xff +#define _ABORT_LOCK_BUSY 0xff #define _ABORT_LOCK_IS_LOCKED 0xfe #define _ABORT_NESTED_TRYLOCK 0xfd -#ifndef __ASSEMBLER__ - -#define __force_inline __attribute__((__always_inline__)) inline - -static __force_inline int _xbegin(void) -{ - int ret = _XBEGIN_STARTED; - asm volatile (".byte 0xc7,0xf8 ; .long 0" : "+a" (ret) :: "memory"); - return ret; -} - -static __force_inline void _xend(void) -{ - asm volatile (".byte 0x0f,0x01,0xd5" ::: "memory"); -} - -static __force_inline void _xabort(const unsigned int status) -{ - asm volatile (".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory"); -} - -static __force_inline int _xtest(void) -{ - unsigned char out; - asm volatile (".byte 0x0f,0x01,0xd6 ; setnz %0" : "=r" (out) :: "memory"); - return out; -} - -#endif #endif |