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| author | Roland McGrath <roland@hack.frob.com> | 2014-06-12 09:05:54 -0700 |
|---|---|---|
| committer | Roland McGrath <roland@hack.frob.com> | 2014-06-12 09:05:54 -0700 |
| commit | 45262aeedf2f56dcd3b30e37630ea85bb4f55603 (patch) | |
| tree | 726ce7b82a5d652713e514fa2811244fe647e5a7 /sysdeps/unix/sysv/linux/sh/sh4 | |
| parent | 35a5e3e338ae17f3d42c60a708763c5d498fb840 (diff) | |
| download | glibc-45262aeedf2f56dcd3b30e37630ea85bb4f55603.tar.gz glibc-45262aeedf2f56dcd3b30e37630ea85bb4f55603.tar.xz glibc-45262aeedf2f56dcd3b30e37630ea85bb4f55603.zip | |
Move SH code out of nptl/ subdirectory.
Diffstat (limited to 'sysdeps/unix/sysv/linux/sh/sh4')
| -rw-r--r-- | sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h b/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h new file mode 100644 index 0000000000..90be7bd8d0 --- /dev/null +++ b/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h @@ -0,0 +1,4 @@ +/* 4 instruction cycles not accessing cache and TLB are needed after + trapa instruction to avoid an SH-4 silicon bug. */ +#define NEED_SYSCALL_INST_PAD +#include_next <lowlevellock.h> |