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| author | Roland McGrath <roland@gnu.org> | 2004-06-15 20:02:33 +0000 |
|---|---|---|
| committer | Roland McGrath <roland@gnu.org> | 2004-06-15 20:02:33 +0000 |
| commit | e1ad4c533af75b6ab84e789202aa25124bc44592 (patch) | |
| tree | 926c44660ee0211b185e5c1eed3a15dfe41e3dd6 /sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S | |
| parent | 77526fd2387492cc0b767bf14966117353909cf8 (diff) | |
| download | glibc-e1ad4c533af75b6ab84e789202aa25124bc44592.tar.gz glibc-e1ad4c533af75b6ab84e789202aa25124bc44592.tar.xz glibc-e1ad4c533af75b6ab84e789202aa25124bc44592.zip | |
* sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S: Fix pasto
that clobbers r19. Fix pasto that overflowed sigcontext.v_reserve. * sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext.S: Fix pasto that clobbers r19. * sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext.S: Fix pasto that clobbers r19. Fix pasto that overflowed sigcontext.v_reserve. * sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S: Fix setting of sigcontext.v_regs. Fix pasto that clobbers r19. Fix pasto that overflowed sigcontext.v_reserve. * sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S: Fix pasto that clobbers r19. * sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S: Fix setting of sigcontext.v_regs. Fix pasto that clobbers r19. Fix pasto that overflowed sigcontext.v_reserve.
Diffstat (limited to 'sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S')
| -rw-r--r-- | sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S b/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S index 447a18b2c7..6e4bc63b1a 100644 --- a/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S +++ b/sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext.S @@ -187,8 +187,8 @@ ENTRY(__getcontext) addi r9,r9,32 stvx v18,0,r10 - stvx v11,0,r9 - addi r19,r10,32 + stvx v19,0,r9 + addi r10,r10,32 addi r9,r9,32 stvx v20,0,r10 @@ -221,11 +221,6 @@ ENTRY(__getcontext) addi r10,r10,32 addi r9,r9,32 - stvx v10,0,r10 - stvx v11,0,r9 - addi r10,r10,32 - addi r9,r9,32 - mfvscr v0 mfspr r0,VRSAVE stvx v0,0,r10 |