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| author | Tejas Belagod <Tejas.Belagod@arm.com> | 2022-06-27 18:00:50 +0000 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2022-06-30 14:01:08 +0100 |
| commit | e9dd3682963a7038d699430e3ece68045b6caafc (patch) | |
| tree | 6291bcded33b627d881c13aa161cd4329b12b4b6 /sysdeps/unix/sysv/linux/internal-sigset.h | |
| parent | 71d87d85bf54f6522813aec97c19bdd24997341e (diff) | |
| download | glibc-e9dd3682963a7038d699430e3ece68045b6caafc.tar.gz glibc-e9dd3682963a7038d699430e3ece68045b6caafc.tar.xz glibc-e9dd3682963a7038d699430e3ece68045b6caafc.zip | |
AArch64: Add asymmetric faulting mode for tag violations in mem.tagging tunable
The new asymmetric mode is available when HWCAP2_MTE3 is set (support is available), bit2 is set in the tunable (user request per application), and the system is configured such that the asymmetric mode is preferred over sync or async (per-cpu system-wide setting). Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/unix/sysv/linux/internal-sigset.h')
0 files changed, 0 insertions, 0 deletions