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| author | David S. Miller <davem@davemloft.net> | 2012-02-27 20:33:25 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2012-02-27 20:33:25 -0800 |
| commit | d6b5aa5879729713ffd27d38307e373bf60b0049 (patch) | |
| tree | 6602d6b33271eb52bd022c8870252d292b9ecbcc /sysdeps/sparc/sparc64/fpu | |
| parent | 433f48bf3ba7120b9a16ed4816d630f250ea4d92 (diff) | |
| download | glibc-d6b5aa5879729713ffd27d38307e373bf60b0049.tar.gz glibc-d6b5aa5879729713ffd27d38307e373bf60b0049.tar.xz glibc-d6b5aa5879729713ffd27d38307e373bf60b0049.zip | |
Fix %fp/%sp typo in new sparc ceil{,f} assembler.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S: Fix accidental use of frame pointer instead of stack pointer relative arg slot. * sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_ceil.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_ceilf.S: Likewise.
Diffstat (limited to 'sysdeps/sparc/sparc64/fpu')
| -rw-r--r-- | sysdeps/sparc/sparc64/fpu/s_ceil.S | 4 | ||||
| -rw-r--r-- | sysdeps/sparc/sparc64/fpu/s_ceilf.S | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/sysdeps/sparc/sparc64/fpu/s_ceil.S b/sysdeps/sparc/sparc64/fpu/s_ceil.S index 85d1a3cbd1..0bda19b613 100644 --- a/sysdeps/sparc/sparc64/fpu/s_ceil.S +++ b/sysdeps/sparc/sparc64/fpu/s_ceil.S @@ -71,9 +71,9 @@ ENTRY (__ceil) faddd %f0, %f16, %f18 fsubd %f18, %f16, %f18 fcmpd %fcc2, %f18, %f0 - stx %o3, [%fp + STACK_BIAS + 128] + stx %o3, [%sp + STACK_BIAS + 128] - ldd [%fp + STACK_BIAS + 128], %f20 + ldd [%sp + STACK_BIAS + 128], %f20 fmovduge %fcc2, ZERO, %f20 faddd %f18, %f20, %f0 fabsd %f0, %f0 diff --git a/sysdeps/sparc/sparc64/fpu/s_ceilf.S b/sysdeps/sparc/sparc64/fpu/s_ceilf.S index dd5c2f0c79..bd5f0fb7e1 100644 --- a/sysdeps/sparc/sparc64/fpu/s_ceilf.S +++ b/sysdeps/sparc/sparc64/fpu/s_ceilf.S @@ -69,9 +69,9 @@ ENTRY (__ceilf) fadds %f1, %f16, %f5 fsubs %f5, %f16, %f5 fcmps %fcc2, %f5, %f1 - st %o3, [%fp + STACK_BIAS + 128] + st %o3, [%sp + STACK_BIAS + 128] - ld [%fp + STACK_BIAS + 128], %f9 + ld [%sp + STACK_BIAS + 128], %f9 fmovsuge %fcc2, ZERO, %f9 fadds %f5, %f9, %f0 fabss %f0, %f0 |