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| author | David S. Miller <davem@davemloft.net> | 2013-01-14 21:47:29 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-01-14 21:47:29 -0800 |
| commit | 8b954ab9b808a51d8cf6a90c7d1d46a3366e3274 (patch) | |
| tree | cbf6dba7b97106b9ce476078cda8e8f0a1e7bf7c /sysdeps/sparc/sparc-ifunc.h | |
| parent | 65a82e3dd538aabcdbeacf87fcee32f4e355e5b6 (diff) | |
| download | glibc-8b954ab9b808a51d8cf6a90c7d1d46a3366e3274.tar.gz glibc-8b954ab9b808a51d8cf6a90c7d1d46a3366e3274.tar.xz glibc-8b954ab9b808a51d8cf6a90c7d1d46a3366e3274.zip | |
Optimize sparc {ceil,floor}{,f} using vis2 'siam' instruction.
* sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC2): New macro. (SPARC_ASM_VIS2_IFUNC): Likewise. (SPARC_ASM_VIS3_VIS2_IFUNC): Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis3.S: Make use of 'siam' instruction. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis2.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis2.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis2.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis2.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis2.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis2.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis2.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil.S: Hook in new VIS2 routines. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: Add new VIS2 routines to libm-sysdep_routines. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Likewise.
Diffstat (limited to 'sysdeps/sparc/sparc-ifunc.h')
| -rw-r--r-- | sysdeps/sparc/sparc-ifunc.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h index edff5c880f..f68161fc5f 100644 --- a/sysdeps/sparc/sparc-ifunc.h +++ b/sysdeps/sparc/sparc-ifunc.h @@ -51,6 +51,33 @@ ENTRY (__##name) \ mov %o1, %o0; \ END (__##name) +# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \ +ENTRY (__##name) \ + .type __##name, @gnu_indirect_function; \ + SETUP_PIC_REG_LEAF(o3, o5); \ + set m1, %o1; \ + andcc %o0, %o1, %g0; \ + be 8f; \ + nop; \ + sethi %gdop_hix22(f1), %o1; \ + xor %o1, %gdop_lox10(f1), %o1; \ + ba 10f; \ + nop; \ +8: set m2, %o1; \ + andcc %o0, %o1, %g0; \ + be 9f; \ + nop; \ + sethi %gdop_hix22(f2), %o1; \ + xor %o1, %gdop_lox10(f2), %o1; \ + ba 10f; \ + nop; \ +9: sethi %gdop_hix22(dflt), %o1; \ + xor %o1, %gdop_lox10(dflt), %o1; \ +10: add %o3, %o1, %o1; \ + retl; \ + mov %o1, %o0; \ +END (__##name) + # else /* SHARED */ # ifdef __arch64__ @@ -82,19 +109,54 @@ ENTRY (__##name) \ mov %o1, %o0; \ END (__##name) +# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \ +ENTRY (__##name) \ + .type __##name, @gnu_indirect_function; \ + set m1, %o1; \ + andcc %o0, %o1, %g0; \ + be 8f; \ + nop; \ + SET(f1, %g1, %o1); \ + ba 10f; \ + nop; \ +8: set m2, %o1; \ + andcc %o0, %o1, %g0; \ + be 9f; \ + nop; \ + SET(f2, %g1, %o1); \ + ba 10f; \ + nop; \ +9: SET(dflt, %g1, %o1); \ +10: retl; \ + mov %o1, %o0; \ +END (__##name) + # endif /* SHARED */ +#define SPARC_ASM_VIS2_IFUNC(name) \ + SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS2, \ + __##name##_vis2, __##name##_generic) + # ifdef HAVE_AS_VIS3_SUPPORT #define SPARC_ASM_VIS3_IFUNC(name) \ SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS3, \ __##name##_vis3, __##name##_generic) +#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \ + SPARC_ASM_IFUNC2(name, HWCAP_SPARC_VIS3, \ + __##name##_vis3, \ + HWCAP_SPARC_VIS2, \ + __##name##_vis2, __##name##_generic) + # else /* HAVE_AS_VIS3_SUPPORT */ #define SPARC_ASM_VIS3_IFUNC(name) \ SPARC_ASM_IFUNC_DFLT(name, __##name##_generic) +#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \ + SPARC_ASM_VIS2_IFUNC(name) + # endif /* HAVE_AS_VIS3_SUPPORT */ |