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authorAdhemerval Zanella <adhemerval.zanella@linaro.org>2024-03-05 14:02:57 -0300
committerAdhemerval Zanella <adhemerval.zanella@linaro.org>2024-03-12 14:38:08 -0300
commit2149da36836bc32cd66359ca37bab5884af7e81f (patch)
treea238d5f1dfcacdd229f9c4c3d479e8d304195116 /sysdeps/powerpc/powerpc32/stpcpy.S
parent2173173d57971d042c0ad4b281431ae127e9b5b8 (diff)
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riscv: Fix alignment-ignorant memcpy implementation
The memcpy optimization (commit 587a1290a1af7bee6db) has a series
of mistakes:

  - The implementation is wrong: the chunk size calculation is wrong
    leading to invalid memory access.

  - It adds ifunc supports as default, so --disable-multi-arch does
    not work as expected for riscv.

  - It mixes Linux files (memcpy ifunc selection which requires the
    vDSO/syscall mechanism)  with generic support (the memcpy
    optimization itself).

  - There is no __libc_ifunc_impl_list, which makes testing only
    check the selected implementation instead of all supported
    by the system.

This patch also simplifies the required bits to enable ifunc: there
is no need to memcopy.h; nor to add Linux-specific files.

The __memcpy_noalignment tail handling now uses a branchless strategy
similar to aarch64 (overlap 32-bits copies for sizes 4..7 and byte
copies for size 1..3).

Checked on riscv64 and riscv32 by explicitly enabling the function
on __libc_ifunc_impl_list on qemu-system.

Changes from v1:
* Implement the memcpy in assembly to correctly handle RISCV
  strict-alignment.
Reviewed-by: Evan Green <evan@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'sysdeps/powerpc/powerpc32/stpcpy.S')
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