about summary refs log tree commit diff
path: root/sysdeps/powerpc/powerpc32/fpu/s_isnan.S
diff options
context:
space:
mode:
authorJoseph Myers <joseph@codesourcery.com>2013-06-05 20:44:03 +0000
committerJoseph Myers <joseph@codesourcery.com>2013-06-05 20:44:03 +0000
commit9c84384cc18ff589233628c193953ca8d7a39f5c (patch)
tree95d1f5aee409b208db7545d678012eeae9559fae /sysdeps/powerpc/powerpc32/fpu/s_isnan.S
parent5556231db2301917cd14a7450de4eba2368c9763 (diff)
downloadglibc-9c84384cc18ff589233628c193953ca8d7a39f5c.tar.gz
glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.tar.xz
glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.zip
Remove trailing whitespace.
Diffstat (limited to 'sysdeps/powerpc/powerpc32/fpu/s_isnan.S')
-rw-r--r--sysdeps/powerpc/powerpc32/fpu/s_isnan.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/powerpc/powerpc32/fpu/s_isnan.S b/sysdeps/powerpc/powerpc32/fpu/s_isnan.S
index ac8b08856f..98d10daf68 100644
--- a/sysdeps/powerpc/powerpc32/fpu/s_isnan.S
+++ b/sysdeps/powerpc/powerpc32/fpu/s_isnan.S
@@ -21,7 +21,7 @@
 
 /* int __isnan(x)  */
 	.machine power4
-EALIGN (__isnan, 4, 0)	
+EALIGN (__isnan, 4, 0)
 	mffs	fp0
 	mtfsb0	4*cr6+lt /* reset_fpscr_bit (FPSCR_VE) */
 	fcmpu	cr7,fp1,fp1