Update.

	* sysdeps/powerpc/powerpc32/dl-trampoline.S (_dl_prof_resolve):
	Extend _dl_prof_resolve to add pass extra parameters to
	_dl_profile_fixup and set up structure with register content.

1 files changed, 123 insertions, 62 deletions

diff --git a/sysdeps/powerpc/powerpc32/dl-trampoline.S b/sysdeps/powerpc/powerpc32/dl-trampoline.S
index 5585192ea8..ea5ce7b45a 100644
--- a/sysdeps/powerpc/powerpc32/dl-trampoline.S
+++ b/sysdeps/powerpc/powerpc32/dl-trampoline.S
@@ -26,43 +26,43 @@
 _dl_runtime_resolve:
  # We need to save the registers used to pass parameters, and register 0,
  # which is used by _mcount; the registers are saved in a stack frame.
-	stwu 1,-64(1)
-	stw 0,12(1)
-	stw 3,16(1)
-	stw 4,20(1)
+	stwu r1,-64(r1)
+	stw r0,12(r1)
+	stw r3,16(r1)
+	stw r4,20(r1)
  # The code that calls this has put parameters for `fixup' in r12 and r11.
-	mr 3,12
-	stw 5,24(1)
-	mr 4,11
-	stw 6,28(1)
-	mflr 0
+	mr r3,r12
+	stw r5,24(r1)
+	mr r4,r11
+	stw r6,28(r1)
+	mflr r0
  # We also need to save some of the condition register fields
-	stw 7,32(1)
-	stw 0,48(1)
-	stw 8,36(1)
-	mfcr 0
-	stw 9,40(1)
-	stw 10,44(1)
-	stw 0,8(1)
+	stw r7,32(r1)
+	stw r0,48(r1)
+	stw r8,36(r1)
+	mfcr r0
+	stw r9,40(r1)
+	stw r10,44(r1)
+	stw r0,8(r1)
 	bl _dl_fixup@local
  # 'fixup' returns the address we want to branch to.
-	mtctr 3
+	mtctr r3
  # Put the registers back...
-	lwz 0,48(1)
-	lwz 10,44(1)
-	lwz 9,40(1)
-	mtlr 0
-	lwz 8,36(1)
-	lwz 0,8(1)
-	lwz 7,32(1)
-	lwz 6,28(1)
-	mtcrf 0xFF,0
-	lwz 5,24(1)
-	lwz 4,20(1)
-	lwz 3,16(1)
-	lwz 0,12(1)
+	lwz r0,48(r1)
+	lwz r10,44(r1)
+	lwz r9,40(r1)
+	mtlr r0
+	lwz r8,36(r1)
+	lwz r0,8(r1)
+	lwz r7,32(r1)
+	lwz r6,28(r1)
+	mtcrf 0xFF,r0
+	lwz r5,24(r1)
+	lwz r4,20(r1)
+	lwz r3,16(r1)
+	lwz r0,12(r1)
  # ...unwind the stack frame, and jump to the PLT entry we updated.
-	addi 1,1,64
+	addi r1,r1,64
 	bctr
 	.size	 _dl_runtime_resolve,.-_dl_runtime_resolve
 
@@ -72,42 +72,103 @@ _dl_runtime_resolve:
 _dl_prof_resolve:
  # We need to save the registers used to pass parameters, and register 0,
  # which is used by _mcount; the registers are saved in a stack frame.
-	stwu 1,-64(1)
-        stw 0,12(1)
-	stw 3,16(1)
-	stw 4,20(1)
+	stwu r1,-320(r1)
+	/* Stack layout:
+
+	  +312   stackframe
+	  +308   lr
+	  +304   r1
+	  +288   v12
+	  +272   v11
+	  +256   v10
+	  +240   v9
+	  +224   v8
+	  +208   v7
+	  +192   v6
+	  +176   v5
+	  +160   v4
+	  +144   v3
+	  +128   v2
+	  +112   v1
+	  +104   fp8
+	  +96    fp7
+	  +88    fp6
+	  +80    fp5
+	  +72    fp4
+	  +64    fp3
+	  +56    fp2
+	  +48    fp1
+	  +44    r10
+	  +40    r9
+	  +36    r8
+	  +32    r7
+	  +28    r6
+	  +24    r5
+	  +20    r4
+	  +16    r3
+	  +12    r0
+	  +8     cr
+	   r1    link
+	*/
+        stw r0,12(r1)
+	stw r3,16(r1)
+	stw r4,20(r1)
  # The code that calls this has put parameters for `fixup' in r12 and r11.
-	mr 3,12
-	stw 5,24(1)
-	mr 4,11
-	stw 6,28(1)
-	mflr 5
+	mr r3,r12
+	stw r5,24(r1)
+	mr r4,r11
+	stw r6,28(r1)
+	mflr r5
  # We also need to save some of the condition register fields.
-	stw 7,32(1)
-	stw 5,48(1)
-	stw 8,36(1)
-	mfcr 0
-	stw 9,40(1)
-	stw 10,44(1)
-	stw 0,8(1)
+	stw r7,32(r1)
+	stw r5,308(r1)
+	stw r8,36(r1)
+	mfcr r0
+	stw r9,40(r1)
+	stw r10,44(r1)
+	stw r0,8(r1)
+ # Save the floating point registers
+	stfd fp1,48(r1)
+	stfd fp2,56(r1)
+	stfd fp3,64(r1)
+	stfd fp4,72(r1)
+	stfd fp5,80(r1)
+	stfd fp6,88(r1)
+	stfd fp7,96(r1)
+	stfd fp8,104(r1)
+ # XXX TODO: store vmx registers
+ # Load the extra parameters.
+	addi r6,r1,16
+	addi r7,r1,312
+	li r0,-1
+	stw r0,0(r7)
 	bl _dl_profile_fixup@local
  # 'fixup' returns the address we want to branch to.
-	mtctr 3
+	mtctr r3
  # Put the registers back...
-	lwz 0,48(1)
-	lwz 10,44(1)
-	lwz 9,40(1)
-	mtlr 0
-	lwz 8,36(1)
-	lwz 0,8(1)
-	lwz 7,32(1)
-	lwz 6,28(1)
-	mtcrf 0xFF,0
-	lwz 5,24(1)
-	lwz 4,20(1)
-	lwz 3,16(1)
-        lwz 0,12(1)
+	lwz r0,308(r1)
+	lwz r10,44(r1)
+	lwz r9,40(r1)
+	mtlr r0
+	lwz r8,36(r1)
+	lwz r0,8(r1)
+	lwz r7,32(r1)
+	lwz r6,28(r1)
+	mtcrf 0xFF,r0
+	lwz r5,24(r1)
+	lwz r4,20(r1)
+	lwz r3,16(r1)
+        lwz r0,12(r1)
+ # Load the floating point registers.
+	lfd fp1,48(r1)
+	lfd fp2,56(r1)
+	lfd fp3,64(r1)
+	lfd fp4,72(r1)
+	lfd fp5,80(r1)
+	lfd fp6,88(r1)
+	lfd fp7,96(r1)
+	lfd fp8,104(r1)
  # ...unwind the stack frame, and jump to the PLT entry we updated.
-	addi 1,1,64
+	addi r1,r1,320
 	bctr
 	.size	 _dl_prof_resolve,.-_dl_prof_resolve