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| author | Aurelien Jarno <aurelien@aurel32.net> | 2015-12-07 23:07:17 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2015-12-09 19:03:46 +0100 |
| commit | 578d080544d77daad68dd697e77f2dcff50c6c7b (patch) | |
| tree | 9c44c2fd43f54bef3bd450f44028b5b344f98382 /sysdeps/powerpc/fpu_control.h | |
| parent | 3b51c390f76744ccb76a07869c543db4f68484bd (diff) | |
| download | glibc-578d080544d77daad68dd697e77f2dcff50c6c7b.tar.gz glibc-578d080544d77daad68dd697e77f2dcff50c6c7b.tar.xz glibc-578d080544d77daad68dd697e77f2dcff50c6c7b.zip | |
mips: fix testsuite build for O32 FPXX ABI on pre-R2 CPU
On MIPS when the toolchain is using the O32 FPXX ABI, the testsuite fails to build for pre-R2 CPU. It assumes that it is possible to use the -mfp64 option to build tst-abi-fp64amod and tst-abi-fp64mod, while this requires a CPU which supports the mfhc1 and mthc1 instructions, ie at least a R2 CPU: error: '-mgp32' and '-mfp64' can only be combined if the target supports the mfhc1 and mthc1 instructions The same way it assumes that it is possible to use the -modd-spreg option to build tst-abi-fpxxomod and tst-abi-fp64mod, while this requires at least a R1 CPU: warning: the 'mips2' architecture does not support odd single-precision registers This patches changes that by checking the usability of -mfp64 and -modd-spreg options in configure, and disable those tests when they can not be used.
Diffstat (limited to 'sysdeps/powerpc/fpu_control.h')
0 files changed, 0 insertions, 0 deletions