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| author | Ulrich Drepper <drepper@redhat.com> | 2010-11-05 07:57:46 -0400 |
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| committer | Ulrich Drepper <drepper@redhat.com> | 2010-11-05 07:57:46 -0400 |
| commit | c0dde15b5dba7e02ce6f36eab3a4d1c166f9951b (patch) | |
| tree | ba46149312b4ab5e66771663289e3754bcc45d84 /sysdeps/powerpc/abort-instr.h | |
| parent | 0e516e0e14f2f9783a21cd1727bc53776341f857 (diff) | |
| download | glibc-c0dde15b5dba7e02ce6f36eab3a4d1c166f9951b.tar.gz glibc-c0dde15b5dba7e02ce6f36eab3a4d1c166f9951b.tar.xz glibc-c0dde15b5dba7e02ce6f36eab3a4d1c166f9951b.zip | |
32bit memset-sse2.S fails with uneven cache size
32bit memset-sse2.S assumes cache size is multiple of 128 bytes. If it isn't true, memset-sse2.S will fail. For example, a processor can have 24576 KB L3 cache and 20 cores. That is 2516582 byte per core. Half of it is 1258291, which isn't helpful for vector instructions. This patch rounds cache sizes to multiple of 256 bytes and adds "raw" cache sizes.
Diffstat (limited to 'sysdeps/powerpc/abort-instr.h')
0 files changed, 0 insertions, 0 deletions