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author | H.J. Lu <hjl.tools@gmail.com> | 2024-03-18 06:40:16 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2024-03-18 19:45:13 -0700 |
commit | 717ebfa85c8240d32d0d19d86a484c31c55c9617 (patch) | |
tree | a9302ec711b0562c6313682e786b03cfe8bf1254 /sysdeps/mips/tst-mode-switch-1.c | |
parent | f44f3aed31a2d18dc1aa70fce8d466cf6e56b93c (diff) | |
download | glibc-717ebfa85c8240d32d0d19d86a484c31c55c9617.tar.gz glibc-717ebfa85c8240d32d0d19d86a484c31c55c9617.tar.xz glibc-717ebfa85c8240d32d0d19d86a484c31c55c9617.zip |
x86-64: Allocate state buffer space for RDI, RSI and RBX
_dl_tlsdesc_dynamic preserves RDI, RSI and RBX before realigning stack. After realigning stack, it saves RCX, RDX, R8, R9, R10 and R11. Define TLSDESC_CALL_REGISTER_SAVE_AREA to allocate space for RDI, RSI and RBX to avoid clobbering saved RDI, RSI and RBX values on stack by xsave to STATE_SAVE_OFFSET(%rsp). +==================+<- stack frame start aligned at 8 or 16 bytes | |<- RDI saved in the red zone | |<- RSI saved in the red zone | |<- RBX saved in the red zone | |<- paddings for stack realignment of 64 bytes |------------------|<- xsave buffer end aligned at 64 bytes | |<- | |<- | |<- |------------------|<- xsave buffer start at STATE_SAVE_OFFSET(%rsp) | |<- 8-byte padding for 64-byte alignment | |<- 8-byte padding for 64-byte alignment | |<- R11 | |<- R10 | |<- R9 | |<- R8 | |<- RDX | |<- RCX +==================+<- RSP aligned at 64 bytes Define TLSDESC_CALL_REGISTER_SAVE_AREA, the total register save area size for all integer registers by adding 24 to STATE_SAVE_OFFSET since RDI, RSI and RBX are saved onto stack without adjusting stack pointer first, using the red-zone. This fixes BZ #31501. Reviewed-by: Sunil K Pandey <skpgkp2@gmail.com>
Diffstat (limited to 'sysdeps/mips/tst-mode-switch-1.c')
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