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author | Dragan Mladjenovic <dmladjenovic@wavecomp.com> | 2019-11-19 15:06:20 +0100 |
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committer | dragan.mladjenovic <dragan.mladjenovic@rt-rk.com> | 2019-12-16 19:35:22 +0100 |
commit | 020b2a97bb15f807c0482f0faee2184ed05bcad8 (patch) | |
tree | 8a3584e674fe634486796da660483c406a13e442 /sysdeps/mach | |
parent | f1a0eb5b6762b315517469da47735c51bde6f4ad (diff) | |
download | glibc-020b2a97bb15f807c0482f0faee2184ed05bcad8.tar.gz glibc-020b2a97bb15f807c0482f0faee2184ed05bcad8.tar.xz glibc-020b2a97bb15f807c0482f0faee2184ed05bcad8.zip |
mips: Do not include hi and lo in __SYSCALL_CLOBBERS for R6
GCC 10 (PR 91233) won't silently allow registers that are not architecturally available to be present in the clobber list anymore, resulting in build failure for mips*r6 targets in form of: ... .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target 146 | __asm__ volatile ( \ | ^~~~~~~ This is because base R6 ISA doesn't define hi and lo registers w/o DSP extension. This patch provides the alternative definitions of __SYSCALL_CLOBBERS for r6 targets that won't include those registers. * sysdeps/unix/sysv/linux/mips/mips32/sysdep.h (__SYSCALL_CLOBBERS): Exclude hi and lo from the clobber list for __mips_isa_rev >= 6. * sysdeps/unix/sysv/linux/mips/mips64/n32/sysdep.h (__SYSCALL_CLOBBERS): Likewise. * sysdeps/unix/sysv/linux/mips/mips64/n64/sysdep.h (__SYSCALL_CLOBBERS): Likewise.
Diffstat (limited to 'sysdeps/mach')
0 files changed, 0 insertions, 0 deletions