diff options
| author | mengqinggang <mengqinggang@loongson.cn> | 2024-06-14 11:58:30 +0800 |
|---|---|---|
| committer | caiyinyu <caiyinyu@loongson.cn> | 2024-06-19 10:06:41 +0800 |
| commit | 9a675d998ea1b37d5fc40611b015cc5c595d375c (patch) | |
| tree | 36405c29bca714e5bb53c89c4a28a31b2f136806 /sysdeps/loongarch | |
| parent | 92341e31502865a0ab1f28e2240df20d19371832 (diff) | |
| download | glibc-9a675d998ea1b37d5fc40611b015cc5c595d375c.tar.gz glibc-9a675d998ea1b37d5fc40611b015cc5c595d375c.tar.xz glibc-9a675d998ea1b37d5fc40611b015cc5c595d375c.zip | |
LoongArch: Fix _dl_tlsdesc_dynamic in LSX case
HWCAP value is overwritten at the first comparison of the LASX case. The second comparison at LSX get incorrect result. Change to use t0 to save HWCAP value, and use t1 to save comparison result.
Diffstat (limited to 'sysdeps/loongarch')
| -rw-r--r-- | sysdeps/loongarch/dl-tlsdesc.S | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/sysdeps/loongarch/dl-tlsdesc.S b/sysdeps/loongarch/dl-tlsdesc.S index 346b80f2ec..a6627cc754 100644 --- a/sysdeps/loongarch/dl-tlsdesc.S +++ b/sysdeps/loongarch/dl-tlsdesc.S @@ -81,7 +81,7 @@ _dl_tlsdesc_undefweak: _dl_tlsdesc_dynamic (struct tlsdesc *tdp) { struct tlsdesc_dynamic_arg *td = tdp->arg; - dtv_t *dtv = *(dtv_t **)((char *)__thread_pointer - TCBHEAD_DTV); + dtv_t *dtv = *(dtv_t **)((char *)__thread_pointer - SIZE_OF_TCB); if (__glibc_likely (td->gen_count <= dtv[0].counter && (dtv[td->tlsinfo.ti_module].pointer.val != TLS_DTV_UNALLOCATED), @@ -177,8 +177,8 @@ Hign address dynamic_block1 <----- dtv5 */ /* Whether support LASX. */ la.global t0, _rtld_global_ro REG_L t0, t0, GLRO_DL_HWCAP_OFFSET - andi t0, t0, HWCAP_LOONGARCH_LASX - beqz t0, .Llsx + andi t1, t0, HWCAP_LOONGARCH_LASX + beqz t1, .Llsx /* Save 256-bit vector registers. FIXME: Without vector ABI, save all vector registers. */ @@ -219,8 +219,8 @@ Hign address dynamic_block1 <----- dtv5 */ .Llsx: /* Whether support LSX. */ - andi t0, t0, HWCAP_LOONGARCH_LSX - beqz t0, .Lfloat + andi t1, t0, HWCAP_LOONGARCH_LSX + beqz t1, .Lfloat /* Save 128-bit vector registers. */ ADDI sp, sp, -FRAME_SIZE_LSX @@ -296,8 +296,8 @@ Hign address dynamic_block1 <----- dtv5 */ la.global t0, _rtld_global_ro REG_L t0, t0, GLRO_DL_HWCAP_OFFSET - andi t0, t0, HWCAP_LOONGARCH_LASX - beqz t0, .Llsx1 + andi t1, t0, HWCAP_LOONGARCH_LASX + beqz t1, .Llsx1 /* Restore 256-bit vector registers. */ xvld xr0, sp, 0*SZXREG @@ -336,8 +336,8 @@ Hign address dynamic_block1 <----- dtv5 */ b .Lfcsr .Llsx1: - andi t0, s0, HWCAP_LOONGARCH_LSX - beqz t0, .Lfloat1 + andi t1, t0, HWCAP_LOONGARCH_LSX + beqz t1, .Lfloat1 /* Restore 128-bit vector registers. */ vld vr0, sp, 0*SZVREG |