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| author | mengqinggang <mengqinggang@loongson.cn> | 2024-05-08 10:06:15 +0800 |
|---|---|---|
| committer | caiyinyu <caiyinyu@loongson.cn> | 2024-05-15 10:31:53 +0800 |
| commit | 1dbf2bef7934cee9829d875f11968d6ff1fee77f (patch) | |
| tree | d9e2a0c544e5a7468bfc5149613155f2d2d4efdf /sysdeps/loongarch/sys | |
| parent | f942a732d37a96217ef828116ebe64a644db18d7 (diff) | |
| download | glibc-1dbf2bef7934cee9829d875f11968d6ff1fee77f.tar.gz glibc-1dbf2bef7934cee9829d875f11968d6ff1fee77f.tar.xz glibc-1dbf2bef7934cee9829d875f11968d6ff1fee77f.zip | |
LoongArch: Add support for TLS Descriptors
This is mostly based on AArch64 and RISC-V implementation. Add R_LARCH_TLS_DESC32 and R_LARCH_TLS_DESC64 relocations. For _dl_tlsdesc_dynamic function slow path, temporarily save and restore all vector registers.
Diffstat (limited to 'sysdeps/loongarch/sys')
| -rw-r--r-- | sysdeps/loongarch/sys/asm.h | 1 | ||||
| -rw-r--r-- | sysdeps/loongarch/sys/regdef.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/sysdeps/loongarch/sys/asm.h b/sysdeps/loongarch/sys/asm.h index 51521a7eb4..23c1d12914 100644 --- a/sysdeps/loongarch/sys/asm.h +++ b/sysdeps/loongarch/sys/asm.h @@ -25,6 +25,7 @@ /* Macros to handle different pointer/register sizes for 32/64-bit code. */ #define SZREG 8 #define SZFREG 8 +#define SZFCSREG 4 #define SZVREG 16 #define SZXREG 32 #define REG_L ld.d diff --git a/sysdeps/loongarch/sys/regdef.h b/sysdeps/loongarch/sys/regdef.h index f61ee25b25..80ce3e9c00 100644 --- a/sysdeps/loongarch/sys/regdef.h +++ b/sysdeps/loongarch/sys/regdef.h @@ -97,6 +97,7 @@ #define fcc5 $fcc5 #define fcc6 $fcc6 #define fcc7 $fcc7 +#define fcsr0 $fcsr0 #define vr0 $vr0 #define vr1 $vr1 |