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author | H.J. Lu <hjl.tools@gmail.com> | 2016-05-19 10:02:36 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2016-05-19 10:02:36 -0700 |
commit | de71e0421b4e267f9b6cf5a827ee5bab70226cd9 (patch) | |
tree | 5fc28f7cded00f91262356bd505b16f986784e56 /sysdeps/ia64/fpu/s_finitel.S | |
parent | 7c08d791ee4fabf96d96b66dec803602e621057c (diff) | |
download | glibc-de71e0421b4e267f9b6cf5a827ee5bab70226cd9.tar.gz glibc-de71e0421b4e267f9b6cf5a827ee5bab70226cd9.tar.xz glibc-de71e0421b4e267f9b6cf5a827ee5bab70226cd9.zip |
Correct Intel processor level type mask from CPUID
Intel CPUID with EAX == 11 returns: ECX Bits 07 - 00: Level number. Same value in ECX input. Bits 15 - 08: Level type. ^^^^^^^^^^^^^^^^^^^^^^^^ This is level type. Bits 31 - 16: Reserved. Intel processor level type mask should be 0xff00, not 0xff0. [BZ #20119] * sysdeps/x86/cacheinfo.c (init_cacheinfo): Correct Intel processor level type mask for CPUID with EAX == 11.
Diffstat (limited to 'sysdeps/ia64/fpu/s_finitel.S')
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