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| author | Wilco Dijkstra <Wilco.Dijkstra@arm.com> | 2014-04-28 10:53:04 +0100 |
|---|---|---|
| committer | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2014-04-28 10:53:04 +0100 |
| commit | df639d73f421e176d6789b42e47596e3ab5cb70f (patch) | |
| tree | 5c98747d456b6025a6388e30e6f7e23dbd9c4060 /sysdeps/arm/fpu_control.h | |
| parent | 48332d822090e41253692053a00dfe224d3ebec0 (diff) | |
| download | glibc-df639d73f421e176d6789b42e47596e3ab5cb70f.tar.gz glibc-df639d73f421e176d6789b42e47596e3ab5cb70f.tar.xz glibc-df639d73f421e176d6789b42e47596e3ab5cb70f.zip | |
[ARM] Add support for fenv_private on ARM.
Diffstat (limited to 'sysdeps/arm/fpu_control.h')
| -rw-r--r-- | sysdeps/arm/fpu_control.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/sysdeps/arm/fpu_control.h b/sysdeps/arm/fpu_control.h index 6d54b9bfee..0377697215 100644 --- a/sysdeps/arm/fpu_control.h +++ b/sysdeps/arm/fpu_control.h @@ -37,11 +37,16 @@ extern fpu_control_t __fpu_control; #define _FPU_MASK_UM 0x00000800 /* underflow */ #define _FPU_MASK_PM 0x00001000 /* inexact */ +#define _FPU_MASK_NZCV 0xF0000000 /* NZCV flags */ + +#define _FPU_MASK_EXCEPT 0x00001f1f /* all exception flags */ + /* Some bits in the FPSCR are not yet defined. They must be preserved when modifying the contents. */ #define _FPU_RESERVED 0x00086060 #define _FPU_DEFAULT 0x00000000 -/* Default + exceptions enabled. */ + +/* Default + exceptions enabled. */ #define _FPU_IEEE (_FPU_DEFAULT | 0x00001f00) /* Type of the control word. */ |