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| author | Chris Metcalf <cmetcalf@mellanox.com> | 2017-12-05 10:24:56 -0500 |
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| committer | Chris Metcalf <cmetcalf@mellanox.com> | 2017-12-05 10:24:56 -0500 |
| commit | f18b8dc7d7ef3f01804e241d40f92faf480264c0 (patch) | |
| tree | afdff9b17e2e45a11f18d5ea87a22c6705949d73 /sysdeps/arm/armv7/multiarch | |
| parent | 446d22e91d3113be57a4b0d1151cf337458c3bec (diff) | |
| download | glibc-f18b8dc7d7ef3f01804e241d40f92faf480264c0.tar.gz glibc-f18b8dc7d7ef3f01804e241d40f92faf480264c0.tar.xz glibc-f18b8dc7d7ef3f01804e241d40f92faf480264c0.zip | |
tilegx: work around vector insn bug in gcc
Avoid an issue in gcc where some of the vector (aka SIMD) ops will sometimes end up getting wrongly optimized out. We use these instructions in many of the string implementations. If/when we have an upstreamed fix for this problem in gcc we can conditionalize the use of the extended assembly workaround in glibc.
Diffstat (limited to 'sysdeps/arm/armv7/multiarch')
0 files changed, 0 insertions, 0 deletions