Relocate alpha from ports to libc

Also fixed the following whitespace nits to satisfy the push:

sysdeps/alpha/alphaev6/memset.S:142: space before tab in indent.
sysdeps/alpha/configure:1: new blank line at EOF.
sysdeps/alpha/fpu/e_sqrt.c:126: space before tab in indent.
sysdeps/alpha/preconfigure:1: new blank line at EOF.
sysdeps/unix/sysv/linux/alpha/syscalls.list:1: new blank line at EOF.

5 files changed, 564 insertions, 0 deletions

diff --git a/sysdeps/alpha/bits/atomic.h b/sysdeps/alpha/bits/atomic.h
new file mode 100644
index 0000000000..abbbc7c92d
--- /dev/null
+++ b/sysdeps/alpha/bits/atomic.h
@@ -0,0 +1,368 @@
+/* Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdint.h>
+
+typedef int8_t atomic8_t;
+typedef uint8_t uatomic8_t;
+typedef int_fast8_t atomic_fast8_t;
+typedef uint_fast8_t uatomic_fast8_t;
+
+typedef int16_t atomic16_t;
+typedef uint16_t uatomic16_t;
+typedef int_fast16_t atomic_fast16_t;
+typedef uint_fast16_t uatomic_fast16_t;
+
+typedef int32_t atomic32_t;
+typedef uint32_t uatomic32_t;
+typedef int_fast32_t atomic_fast32_t;
+typedef uint_fast32_t uatomic_fast32_t;
+
+typedef int64_t atomic64_t;
+typedef uint64_t uatomic64_t;
+typedef int_fast64_t atomic_fast64_t;
+typedef uint_fast64_t uatomic_fast64_t;
+
+typedef intptr_t atomicptr_t;
+typedef uintptr_t uatomicptr_t;
+typedef intmax_t atomic_max_t;
+typedef uintmax_t uatomic_max_t;
+
+
+#ifdef UP
+# define __MB		/* nothing */
+#else
+# define __MB		"	mb\n"
+#endif
+
+
+/* Compare and exchange.  For all of the "xxx" routines, we expect a
+   "__prev" and a "__cmp" variable to be provided by the enclosing scope,
+   in which values are returned.  */
+
+#define __arch_compare_and_exchange_xxx_8_int(mem, new, old, mb1, mb2)	\
+({									\
+  unsigned long __tmp, __snew, __addr64;				\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"	andnot	%[__addr8],7,%[__addr64]\n"			\
+	"	insbl	%[__new],%[__addr8],%[__snew]\n"		\
+	"1:	ldq_l	%[__tmp],0(%[__addr64])\n"			\
+	"	extbl	%[__tmp],%[__addr8],%[__prev]\n"		\
+	"	cmpeq	%[__prev],%[__old],%[__cmp]\n"			\
+	"	beq	%[__cmp],2f\n"					\
+	"	mskbl	%[__tmp],%[__addr8],%[__tmp]\n"			\
+	"	or	%[__snew],%[__tmp],%[__tmp]\n"			\
+	"	stq_c	%[__tmp],0(%[__addr64])\n"			\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	"2:"								\
+	: [__prev] "=&r" (__prev),					\
+	  [__snew] "=&r" (__snew),					\
+	  [__tmp] "=&r" (__tmp),					\
+	  [__cmp] "=&r" (__cmp),					\
+	  [__addr64] "=&r" (__addr64)					\
+	: [__addr8] "r" (mem),						\
+	  [__old] "Ir" ((uint64_t)(uint8_t)(uint64_t)(old)),		\
+	  [__new] "r" (new)						\
+	: "memory");							\
+})
+
+#define __arch_compare_and_exchange_xxx_16_int(mem, new, old, mb1, mb2) \
+({									\
+  unsigned long __tmp, __snew, __addr64;				\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"	andnot	%[__addr16],7,%[__addr64]\n"			\
+	"	inswl	%[__new],%[__addr16],%[__snew]\n"		\
+	"1:	ldq_l	%[__tmp],0(%[__addr64])\n"			\
+	"	extwl	%[__tmp],%[__addr16],%[__prev]\n"		\
+	"	cmpeq	%[__prev],%[__old],%[__cmp]\n"			\
+	"	beq	%[__cmp],2f\n"					\
+	"	mskwl	%[__tmp],%[__addr16],%[__tmp]\n"		\
+	"	or	%[__snew],%[__tmp],%[__tmp]\n"			\
+	"	stq_c	%[__tmp],0(%[__addr64])\n"			\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	"2:"								\
+	: [__prev] "=&r" (__prev),					\
+	  [__snew] "=&r" (__snew),					\
+	  [__tmp] "=&r" (__tmp),					\
+	  [__cmp] "=&r" (__cmp),					\
+	  [__addr64] "=&r" (__addr64)					\
+	: [__addr16] "r" (mem),						\
+	  [__old] "Ir" ((uint64_t)(uint16_t)(uint64_t)(old)),		\
+	  [__new] "r" (new)						\
+	: "memory");							\
+})
+
+#define __arch_compare_and_exchange_xxx_32_int(mem, new, old, mb1, mb2) \
+({									\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"1:	ldl_l	%[__prev],%[__mem]\n"				\
+	"	cmpeq	%[__prev],%[__old],%[__cmp]\n"			\
+	"	beq	%[__cmp],2f\n"					\
+	"	mov	%[__new],%[__cmp]\n"				\
+	"	stl_c	%[__cmp],%[__mem]\n"				\
+	"	beq	%[__cmp],1b\n"					\
+		mb2							\
+	"2:"								\
+	: [__prev] "=&r" (__prev),					\
+	  [__cmp] "=&r" (__cmp)						\
+	: [__mem] "m" (*(mem)),						\
+	  [__old] "Ir" ((uint64_t)(atomic32_t)(uint64_t)(old)),		\
+	  [__new] "Ir" (new)						\
+	: "memory");							\
+})
+
+#define __arch_compare_and_exchange_xxx_64_int(mem, new, old, mb1, mb2) \
+({									\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"1:	ldq_l	%[__prev],%[__mem]\n"				\
+	"	cmpeq	%[__prev],%[__old],%[__cmp]\n"			\
+	"	beq	%[__cmp],2f\n"					\
+	"	mov	%[__new],%[__cmp]\n"				\
+	"	stq_c	%[__cmp],%[__mem]\n"				\
+	"	beq	%[__cmp],1b\n"					\
+		mb2							\
+	"2:"								\
+	: [__prev] "=&r" (__prev),					\
+	  [__cmp] "=&r" (__cmp)						\
+	: [__mem] "m" (*(mem)),						\
+	  [__old] "Ir" ((uint64_t)(old)),				\
+	  [__new] "Ir" (new)						\
+	: "memory");							\
+})
+
+/* For all "bool" routines, we return FALSE if exchange succesful.  */
+
+#define __arch_compare_and_exchange_bool_8_int(mem, new, old, mb1, mb2)	\
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_8_int(mem, new, old, mb1, mb2);	\
+   !__cmp; })
+
+#define __arch_compare_and_exchange_bool_16_int(mem, new, old, mb1, mb2) \
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_16_int(mem, new, old, mb1, mb2);	\
+   !__cmp; })
+
+#define __arch_compare_and_exchange_bool_32_int(mem, new, old, mb1, mb2) \
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_32_int(mem, new, old, mb1, mb2);	\
+   !__cmp; })
+
+#define __arch_compare_and_exchange_bool_64_int(mem, new, old, mb1, mb2) \
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_64_int(mem, new, old, mb1, mb2);	\
+   !__cmp; })
+
+/* For all "val" routines, return the old value whether exchange
+   successful or not.  */
+
+#define __arch_compare_and_exchange_val_8_int(mem, new, old, mb1, mb2)	\
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_8_int(mem, new, old, mb1, mb2);	\
+   (typeof (*mem))__prev; })
+
+#define __arch_compare_and_exchange_val_16_int(mem, new, old, mb1, mb2) \
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_16_int(mem, new, old, mb1, mb2);	\
+   (typeof (*mem))__prev; })
+
+#define __arch_compare_and_exchange_val_32_int(mem, new, old, mb1, mb2) \
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_32_int(mem, new, old, mb1, mb2);	\
+   (typeof (*mem))__prev; })
+
+#define __arch_compare_and_exchange_val_64_int(mem, new, old, mb1, mb2) \
+({ unsigned long __prev; int __cmp;					\
+   __arch_compare_and_exchange_xxx_64_int(mem, new, old, mb1, mb2);	\
+   (typeof (*mem))__prev; })
+
+/* Compare and exchange with "acquire" semantics, ie barrier after.  */
+
+#define atomic_compare_and_exchange_bool_acq(mem, new, old)	\
+  __atomic_bool_bysize (__arch_compare_and_exchange_bool, int,	\
+		        mem, new, old, "", __MB)
+
+#define atomic_compare_and_exchange_val_acq(mem, new, old)	\
+  __atomic_val_bysize (__arch_compare_and_exchange_val, int,	\
+		       mem, new, old, "", __MB)
+
+/* Compare and exchange with "release" semantics, ie barrier before.  */
+
+#define atomic_compare_and_exchange_bool_rel(mem, new, old)	\
+  __atomic_bool_bysize (__arch_compare_and_exchange_bool, int,	\
+		        mem, new, old, __MB, "")
+
+#define atomic_compare_and_exchange_val_rel(mem, new, old)	\
+  __atomic_val_bysize (__arch_compare_and_exchange_val, int,	\
+		       mem, new, old, __MB, "")
+
+
+/* Atomically store value and return the previous value.  */
+
+#define __arch_exchange_8_int(mem, value, mb1, mb2)			\
+({									\
+  unsigned long __tmp, __addr64, __sval; __typeof(*mem) __ret;		\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"	andnot	%[__addr8],7,%[__addr64]\n"			\
+	"	insbl	%[__value],%[__addr8],%[__sval]\n"		\
+	"1:	ldq_l	%[__tmp],0(%[__addr64])\n"			\
+	"	extbl	%[__tmp],%[__addr8],%[__ret]\n"			\
+	"	mskbl	%[__tmp],%[__addr8],%[__tmp]\n"			\
+	"	or	%[__sval],%[__tmp],%[__tmp]\n"			\
+	"	stq_c	%[__tmp],0(%[__addr64])\n"			\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	: [__ret] "=&r" (__ret),					\
+	  [__sval] "=&r" (__sval),					\
+	  [__tmp] "=&r" (__tmp),					\
+	  [__addr64] "=&r" (__addr64)					\
+	: [__addr8] "r" (mem),						\
+	  [__value] "r" (value)						\
+	: "memory");							\
+  __ret; })
+
+#define __arch_exchange_16_int(mem, value, mb1, mb2)			\
+({									\
+  unsigned long __tmp, __addr64, __sval; __typeof(*mem) __ret;		\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"	andnot	%[__addr16],7,%[__addr64]\n"			\
+	"	inswl	%[__value],%[__addr16],%[__sval]\n"		\
+	"1:	ldq_l	%[__tmp],0(%[__addr64])\n"			\
+	"	extwl	%[__tmp],%[__addr16],%[__ret]\n"		\
+	"	mskwl	%[__tmp],%[__addr16],%[__tmp]\n"		\
+	"	or	%[__sval],%[__tmp],%[__tmp]\n"			\
+	"	stq_c	%[__tmp],0(%[__addr64])\n"			\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	: [__ret] "=&r" (__ret),					\
+	  [__sval] "=&r" (__sval),					\
+	  [__tmp] "=&r" (__tmp),					\
+	  [__addr64] "=&r" (__addr64)					\
+	: [__addr16] "r" (mem),						\
+	  [__value] "r" (value)						\
+	: "memory");							\
+  __ret; })
+
+#define __arch_exchange_32_int(mem, value, mb1, mb2)			\
+({									\
+  signed int __tmp; __typeof(*mem) __ret;				\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"1:	ldl_l	%[__ret],%[__mem]\n"				\
+	"	mov	%[__val],%[__tmp]\n"				\
+	"	stl_c	%[__tmp],%[__mem]\n"				\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	: [__ret] "=&r" (__ret),					\
+	  [__tmp] "=&r" (__tmp)						\
+	: [__mem] "m" (*(mem)),						\
+	  [__val] "Ir" (value)						\
+	: "memory");							\
+  __ret; })
+
+#define __arch_exchange_64_int(mem, value, mb1, mb2)			\
+({									\
+  unsigned long __tmp; __typeof(*mem) __ret;				\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"1:	ldq_l	%[__ret],%[__mem]\n"				\
+	"	mov	%[__val],%[__tmp]\n"				\
+	"	stq_c	%[__tmp],%[__mem]\n"				\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	: [__ret] "=&r" (__ret),					\
+	  [__tmp] "=&r" (__tmp)						\
+	: [__mem] "m" (*(mem)),						\
+	  [__val] "Ir" (value)						\
+	: "memory");							\
+  __ret; })
+
+#define atomic_exchange_acq(mem, value) \
+  __atomic_val_bysize (__arch_exchange, int, mem, value, "", __MB)
+
+#define atomic_exchange_rel(mem, value) \
+  __atomic_val_bysize (__arch_exchange, int, mem, value, __MB, "")
+
+
+/* Atomically add value and return the previous (unincremented) value.  */
+
+#define __arch_exchange_and_add_8_int(mem, value, mb1, mb2) \
+  ({ __builtin_trap (); 0; })
+
+#define __arch_exchange_and_add_16_int(mem, value, mb1, mb2) \
+  ({ __builtin_trap (); 0; })
+
+#define __arch_exchange_and_add_32_int(mem, value, mb1, mb2)		\
+({									\
+  signed int __tmp; __typeof(*mem) __ret;				\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"1:	ldl_l	%[__ret],%[__mem]\n"				\
+	"	addl	%[__ret],%[__val],%[__tmp]\n"			\
+	"	stl_c	%[__tmp],%[__mem]\n"				\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	: [__ret] "=&r" (__ret),					\
+	  [__tmp] "=&r" (__tmp)						\
+	: [__mem] "m" (*(mem)),						\
+	  [__val] "Ir" ((signed int)(value))				\
+	: "memory");							\
+  __ret; })
+
+#define __arch_exchange_and_add_64_int(mem, value, mb1, mb2)		\
+({									\
+  unsigned long __tmp; __typeof(*mem) __ret;				\
+  __asm__ __volatile__ (						\
+		mb1							\
+	"1:	ldq_l	%[__ret],%[__mem]\n"				\
+	"	addq	%[__ret],%[__val],%[__tmp]\n"			\
+	"	stq_c	%[__tmp],%[__mem]\n"				\
+	"	beq	%[__tmp],1b\n"					\
+		mb2							\
+	: [__ret] "=&r" (__ret),					\
+	  [__tmp] "=&r" (__tmp)						\
+	: [__mem] "m" (*(mem)),						\
+	  [__val] "Ir" ((unsigned long)(value))				\
+	: "memory");							\
+  __ret; })
+
+/* ??? Barrier semantics for atomic_exchange_and_add appear to be
+   undefined.  Use full barrier for now, as that's safe.  */
+#define atomic_exchange_and_add(mem, value) \
+  __atomic_val_bysize (__arch_exchange_and_add, int, mem, value, __MB, __MB)
+
+
+/* ??? Blah, I'm lazy.  Implement these later.  Can do better than the
+   compare-and-exchange loop provided by generic code.
+
+#define atomic_decrement_if_positive(mem)
+#define atomic_bit_test_set(mem, bit)
+
+*/
+
+#ifndef UP
+# define atomic_full_barrier()	__asm ("mb" : : : "memory");
+# define atomic_read_barrier()	__asm ("mb" : : : "memory");
+# define atomic_write_barrier()	__asm ("wmb" : : : "memory");
+#endif
diff --git a/sysdeps/alpha/bits/endian.h b/sysdeps/alpha/bits/endian.h
new file mode 100644
index 0000000000..8a16e14e24
--- /dev/null
+++ b/sysdeps/alpha/bits/endian.h
@@ -0,0 +1,7 @@
+/* Alpha is little-endian.  */
+
+#ifndef _ENDIAN_H
+# error "Never use <bits/endian.h> directly; include <endian.h> instead."
+#endif
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
diff --git a/sysdeps/alpha/bits/link.h b/sysdeps/alpha/bits/link.h
new file mode 100644
index 0000000000..69b4d950fd
--- /dev/null
+++ b/sysdeps/alpha/bits/link.h
@@ -0,0 +1,68 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef	_LINK_H
+# error "Never include <bits/link.h> directly; use <link.h> instead."
+#endif
+
+
+/* Registers for entry into PLT on Alpha.  */
+typedef struct La_alpha_regs
+{
+  uint64_t lr_r26;
+  uint64_t lr_sp;
+  uint64_t lr_r16;
+  uint64_t lr_r17;
+  uint64_t lr_r18;
+  uint64_t lr_r19;
+  uint64_t lr_r20;
+  uint64_t lr_r21;
+  double lr_f16;
+  double lr_f17;
+  double lr_f18;
+  double lr_f19;
+  double lr_f20;
+  double lr_f21;
+} La_alpha_regs;
+
+/* Return values for calls from PLT on Alpha.  */
+typedef struct La_alpha_retval
+{
+  uint64_t lrv_r0;
+  uint64_t lrv_r1;
+  double lrv_f0;
+  double lrv_f1;
+} La_alpha_retval;
+
+
+__BEGIN_DECLS
+
+extern Elf64_Addr la_alpha_gnu_pltenter (Elf64_Sym *__sym, unsigned int __ndx,
+				         uintptr_t *__refcook,
+				         uintptr_t *__defcook,
+				         La_alpha_regs *__regs,
+				         unsigned int *__flags,
+				         const char *__symname,
+				         long int *__framesizep);
+extern unsigned int la_alpha_gnu_pltexit (Elf64_Sym *__sym, unsigned int __ndx,
+					  uintptr_t *__refcook,
+					  uintptr_t *__defcook,
+					  const La_alpha_regs *__inregs,
+					  La_alpha_retval *__outregs,
+					  const char *symname);
+
+__END_DECLS
diff --git a/sysdeps/alpha/bits/mathdef.h b/sysdeps/alpha/bits/mathdef.h
new file mode 100644
index 0000000000..064a69e68c
--- /dev/null
+++ b/sysdeps/alpha/bits/mathdef.h
@@ -0,0 +1,60 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#if !defined _MATH_H && !defined _COMPLEX_H
+# error "Never use <bits/mathdef.h> directly; include <math.h> instead"
+#endif
+
+/* FIXME! This file describes properties of the compiler, not the machine;
+   it should not be part of libc!  */
+
+#if defined __USE_ISOC99 && defined _MATH_H && !defined _MATH_H_MATHDEF
+# define _MATH_H_MATHDEF	1
+
+/* Alpha has "float" and "double" operations.  */
+typedef float float_t;    /* float expressions are evaluated as float.  */
+typedef double double_t;  /* double expressions are evaluated as double.  */
+
+/* The values returned by `ilogb' for 0 and NaN respectively.  */
+# define FP_ILOGB0     (-2147483647)
+# define FP_ILOGBNAN   (2147483647)
+
+#endif	/* ISO C99 && MATH_H */
+
+#if defined _COMPLEX_H && !defined _COMPLEX_H_MATHDEF
+# define _COMPLEX_H_MATHDEF 1
+# if defined(__GNUC__) && !__GNUC_PREREQ(3,4)
+
+/* Due to an ABI change, we need to remap the complex float symbols.  */
+#  define _Mdouble_		float
+#  define __MATHCALL(function, args) \
+    __MATHDECL (_Complex float, function, args)
+#  define __MATHDECL(type, function, args) \
+    __MATHDECL_1(type, function##f, args, __c1_##function##f); \
+    __MATHDECL_1(type, __##function##f, args, __c1_##function##f)
+#  define __MATHDECL_1(type, function, args, alias) \
+    extern type function args __asm__(#alias) __THROW
+
+#  include <bits/cmathcalls.h>
+
+#  undef _Mdouble_
+#  undef __MATHCALL
+#  undef __MATHDECL
+#  undef __MATHDECL_1
+
+# endif /* GNUC before 3.4 */
+#endif /* COMPLEX_H */
diff --git a/sysdeps/alpha/bits/setjmp.h b/sysdeps/alpha/bits/setjmp.h
new file mode 100644
index 0000000000..d92e6f866d
--- /dev/null
+++ b/sysdeps/alpha/bits/setjmp.h
@@ -0,0 +1,61 @@
+/* Define the machine-dependent type `jmp_buf'.  Alpha version.
+   Copyright (C) 1992-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _BITS_SETJMP_H
+#define _BITS_SETJMP_H  1
+
+#if !defined _SETJMP_H && !defined _PTHREAD_H
+# error "Never include <bits/setjmp.h> directly; use <setjmp.h> instead."
+#endif
+
+/* The previous bits/setjmp.h had __jmp_buf defined as a structure.
+   We use an array of 'long int' instead, to make writing the
+   assembler easier. Naturally, user code should not depend on
+   either representation. */
+
+/*
+ * Integer registers:
+ *    $0 is the return value (va);
+ *    $1-$8, $22-$25, $28 are call-used (t0-t7, t8-t11, at);
+ *    $9-$14 we save here (s0-s5);
+ *    $15 is the FP and we save it here (fp or s6);
+ *    $16-$21 are input arguments (call-used) (a0-a5);
+ *    $26 is the return PC and we save it here (ra);
+ *    $27 is the procedure value (i.e., the address of __setjmp) (pv or t12);
+ *    $29 is the global pointer, which the caller will reconstruct
+ *        from the return address restored in $26 (gp);
+ *    $30 is the stack pointer and we save it here (sp);
+ *    $31 is always zero (zero).
+ *
+ * Floating-point registers:
+ *    $f0 is the floating return value;
+ *    $f1, $f10-$f15, $f22-$f30 are call-used;
+ *    $f2-$f9 we save here;
+ *    $f16-$21 are input args (call-used);
+ *    $f31 is always zero.
+ *
+ * Note that even on Alpha hardware that does not have an FPU (there
+ * isn't such a thing currently) it is required to implement the FP
+ * registers.
+ */
+
+#ifndef __ASSEMBLY__
+typedef long int __jmp_buf[17];
+#endif
+
+#endif  /* bits/setjmp.h */